ml7084-001 Oki Semiconductor, ml7084-001 Datasheet - Page 103

• Manufacturer Part Number: ml7084-001
• Description: 4ch Voip Codec
• Manufacturer: Oki Semiconductor

(22) CR22
B7 : Receiving side speech codec operation mode notification flag
B6 : Receiving side buffering time operation mode notification flag
B5 : 2-channel reception requesting status notification register
B4 : Reception frame start notification register
B3 : CH1 reception error status retgister
B2 : CH0 reception error status retgister
B1 : Invalid-write-of-receive-data error notification register
OKI Semiconductor
setting can be
Mode where
Initial value
0 : Other than G.711 (μ-law / A-law)
1 : G.711 (μ-law / A-law)
0 : 10 ms
1 : 20 ms
By referencing this bit, the operating mode of the buffering time on the receiving side can be checked. If this bit
is “0” when a reception request is made by a fall of FR1B, it indicates that the receive buffer is requesting
writing of data for 10 ms. If this bit is “1” when a reception request is made by a fall of FR1B, it indicates that
the receive buffer is requesting writing of data for 20 ms.
0 : Other than the state where 2-channel reception is being requested
1 : 2-channel reception is being requested
While requesting 2-channel reception (RXREQ_DC = 1), two reception requests will be made within one
frame.
Write the receive data of channel 1 or channel 2 for each reception request (FR1 = 1)
While requesting 2-channel reception (RXREQ_DC = 1), two reception requests will be made within one frame.
With this bit, whether it is the first reception request or not can be checked.
If this bit is “1” when a reception request (FR1 = 1) is generated, it indicates that it is the first reception request,
and if “0”, it indicates that it is the second reception request.
0 : No CH1 reception error occurred
1 : CH1 reception error occurred
This register is set to “1” if the writing of CH1 receive data does not complete within the valid write period, and
set to “0” for other cases.
0 : No CH0 reception error occurred
1 : CH0 reception error occurred
This register is set to “1” if the writing of CH0 receive data does not complete within the valid read period, and
set to “0” for other cases.
0 : Invalid write of receive data did not occurred
1 : Invalid write of receive data occurred
This register is set to “1” if the channel of receive data is notified from the MCU side without observing the
following prohibited item while requesting 2-channel reception (RXREQ_DC = 1), and set to “0” for other
cases.
changed
CR22
RX_SC
FLAG
B7
⎯
0
RX_BT
FLAG
B6
⎯
0
RXREQ
DC
B5
⎯
0
RXREQ
First
B4
⎯
0
RXERR
_CH1
B3
⎯
0
RXERR
_CH0
B2
⎯
0
RXBW
_ERR
B1
⎯
0
FEDL7224-001FULL-01
ML7224-001TC
FR1
B0
⎯
0
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R/W
R/