ml7084-001 Oki Semiconductor, ml7084-001 Datasheet - Page 26

• Manufacturer Part Number: ml7084-001
• Description: 4ch Voip Codec
• Manufacturer: Oki Semiconductor

PIN FUNCTIONAL DESCRIPTIONS
D0_a–D15_a
Data input/output pins for accessing the frames/DMA/control registers for CH0a/CH1a. Since these are input/output
pins, connect a pull-up resistor. If 8-bit bus access is selected with the MCU interface data width selection register
(BW_SELa), D0–D7 will be enabled. If they are used for 8-bit bus access (BW_SELa = “1”), upper D8–D15 will
always be placed in an input state; therefore, fix the inputs to “0” or “1”.
A0_a–A7_a
Address input pins for accessing the frames/DMA/control registers for CH0a/CH1a. Each address is as follows:
Transmit buffer (TX Buffer)
Receive buffer (RX Buffer)
Control registers (CR,GPCR,DLCR)
CSB_a
Chip select input pin for accessing the frames/control registers for CH0a/CH1a.
RDB_a
Read enable input pin for accessing the frames/DMA/control registers for CH0a/CH1a.
WRB_a
Write enable input pin for accessing the frames/DMA/control registers for CH0a/CH1a.
D0_b–D15_b
Data input/output pins for accessing the frames/DMA/control registers for CH0b/CH1b. Since these are input/output
pins, connect a pull-up resistor. If 8-bit bus access is selected with the MCU interface data width selection register
(BW_SELb), D0–D7 will be enabled. If they are used for 8-bit bus access (BW_SELb = “1”), upper D8–D15 will
always be placed in an input state; therefore, fix the inputs to “0” or “1”.
A0_b–A7_b
Address input pins for accessing the frames/DMA/control register for CH0b/CH1b. Each address is as shown below:
Transmit buffer (TX Buffer)
Receive buffer (RX Buffer)
Control registers (CR,GPCR,DLCR)
CSB_b
Chip select input pin for accessing the frames/control registers for CH0b/CH1b.
RDB_b
Read enable input pin for accessing the frames/DMA/control register for CH0b/CH1b.
WRB_b
Write enable input pin for accessing the frames/DMA/control registers for CH0b/CH1b.
OKI Semiconductor
A7_a–A0_a = 80h
A7_a–A0_a = 81h
For addresses, see the Control Register List.
A7_b–A0_b = 80h
A7_b–A0_b = 81h
For addresses, see the Control Register List.
FEDL7224-001FULL-01
ML7224-001TC
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