ml7084-001 Oki Semiconductor, ml7084-001 Datasheet - Page 193

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ml7084-001

Manufacturer Part Number
ml7084-001
Description
4ch Voip Codec
Manufacturer
Oki Semiconductor
Datasheet
Echo canceller 1 is an echo canceller for CH1. The block diagram of echo canceller 1 is shown in Figure 54.
The echo canceller 1 has a delay time of 32 ms and is activated by setting the echo canceller 1 control register
(EC1_EN) to “1”. The operation setting of the echo canceller 1 is done mainly using internal data memories
EC1_CR and EC1_GLPAD_CR.
Echo Canceller 1
The echo canceller 1 is also equipped with the Comfort Noise generation function that adds generated noise to Sout,
according to the background noise amount of a signal input from Sin.
A. EC1 control register (EC1_EN)
B. Internal data memory for EC1 control (EC1_CR)
B15–B8 : Reserved bits. Do not change the initial values.
OKI Semiconductor
0 : Stops. The echo canceller is bypassed. (Initial value)
1 : Operates.
Initial value : 0012h
Initial value
Initial value
Name
Name
Bit
Bit
THR
B15
B7
0
0
Rout
Sin
Figure 54 Block Diagram of Echo Canceller
B14
B6
LPAD
0
0
FIR Filter(AFF)
+
Adaptive
Echo Canceller
HLD
B13
-
B5
0
0
Howling Detector
ATTs
Double Talk Det
Power Calc
H DB
B12
B4
ATTr
0
1
Center
Clip
CLP
B11
B3
0
0
GPAD
B10
B2
0
0
Sout
Rin
FEDL7224-001FULL-01
ATTB
B9
B1
0
1
ML7224-001TC
B8
B0
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0
0

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