mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 145

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mfr4200

Manufacturer Part Number
mfr4200
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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3.3.2.6
The cycle counter field holds the CC cycle counter value at frame reception time. This field is not used in
message buffers configured for transmission.
3.3.2.7
The payload length field holds the number of words (1 word = 2 bytes) contained in the payload segment
of the frame.
Receive message buffers and receive FIFO:
The payload field indicates the value of the payload length field in the received frame (see
“Message Buffer Slot Status
Transmit message buffers:
The payload field indicates the number of words to be transmitted.
If the host writes a payload length not equal to SPLR into a static frame, the CC generates the CHI error
interrupt SPLME (see
If the host writes a payload length greater than MPLDR into a dynamic frame, the CC generates the CHI
error interrupt MDPLE (see
Note that the size of the data field in the MFR4200 is limited to 32 bytes (see
Features”).
3.3.2.8
The header CRC field contains a cyclic redundancy check code (CRC) computed over the sync bit, startup
bit, the frame ID, and the payload length fields of the frame.
Receive message buffers and Receive FIFO:
The header CRC field contains the header CRC of the semantically valid and syntactically correct received
frame.
Transmit message buffers:
The Header CRC field contains the Header CRC value calculated and provided by the host. Note that the
controller does not check if the Header CRC provided by the host is correct.
3.3.2.9
The SYNC bit determines whether the frame is to be used for clock synchronization.
Receive message buffers and Receive FIFO:
The bit contains the SYNC bit of the stored frame. This bit is updated only when a new semantically valid
frame matching the buffer filters has been stored in the message buffer.
Freescale Semiconductor
CYCLCNT[5:0] — Cycle Counter
LEN[6: 0] — Payload Length
HCRC[10:0] — Header CRC
SYNC — Sync Bit
Section 3.2.3.6.3, “CHI Error Register
Section 3.2.3.6.3, “CHI Error Register
Vector).
MFR4200 Data Sheet, Rev. 0
(CHIER)”).
(CHIER)”).
Section 3.1.1, “MFR4200
Section 3.3.3,
Message Buffer
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