mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 66

• Manufacturer Part Number: mfr4200
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

MFR4200 FlexRay Communication Controller
CONFIG — Configuration State Bit
When the host sets this bit, the CC immediately enters the configuration state. The controller aborts any
ongoing transmission or reception and abandons synchronization to the FlexRay cluster. When the host
clears this bit, the controller resumes normal operation (see
hard reset, the controller automatically enters the configuration state (CONFIG bit set).
1 – Configuration state.
0 – Normal operation.
3.2.3.2.2
Address 0x6
Reset
MATE — Media Access Test Enable
This flag enables the media access test in the MFR4200 bus guardian (BG) monitor. This flag may be
written in the configuration state only.
1 – Media access test is enabled.
0 – Media access test is disabled.
BGSMSWE — BG Schedule Monitoring Symbol Window Enable
This flag determines the behavior of the MFR4200 bus guardian schedule monitor during the symbol
window. It may be written in the configuration state only.
1 – BG is expected to be open during symbol window of the communication cycle.
0 – BG is expected to be closed during symbol window of the communication cycle.
BGSMDSE — BG Schedule Monitoring Dynamic Segment Enable
This flag determines the behavior of the MFR4200 bus guardian monitor during the dynamic segment of
the communication cycle. It may be written in the configuration state only.
1 – BG expected to be open during dynamic segment of the communication cycle.
0 – BG expected to be closed during dynamic segment of the communication cycle.
66
Reserved
Reserved
15
7
r
r
0x0
Module Configuration Register 1 (MCR1)
Reserved
ECSE
rw*
14
6
r
BGSMDSE
Reserved
Figure 3-6. Module Configuration Register 1
rw*
13
5
r
MFR4200 Data Sheet, Rev. 0
BGSMSWE
Reserved
rw*
12
4
r
Reserved
Reserved
11
3
r
r
Section 3.9.2, “Configuration
AYTG
MATE
rw*
rw*
10
2
Reserved
Freescale Semiconductor
ARL
rw*
9
1
r
State”). After a
Reserved
CSI
rw*
8
0
r