mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 36

• Manufacturer Part Number: mfr4200
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

1
2
3
4
Device Overview
2.2.3
2.2.3.1
A[1:6]/XADDR[19:14] are general purpose input pins. Their function is selected by the IF_SEL[0:1] pins.
Refer to
enable or disable either pullup or pulldown resistors on the pins. (See
Pins Pullup/down Enable Register
Control Register
A[1:6] are AMI interface address signals. A1 is the LSB of the AMI address bus.
XADDR[19:14] are HCS12 interface expanded address lines. XADDR14 is the LSB of the HCS12
interface expanded address lines.
2.2.3.2
A[7:9]/ACS[0:2] are general purpose input pins. Their function is selected by the IF_SEL[0:1] pins. Refer
to
disable either pullup or pulldown resistors on the pins.
36
Pin
26 VDDOSC
23
N
# – signal is active-low.
PC (Pullup/down Controlled) – Register controlled internal weak pullup/down for a pin in input mode. Refer to the following
sections for more information:
PD (Pull Down) – Internal weak pulldown for a pin in input mode.
DC (Drive strength Controlled) – Register controlled drive strength for a pin in the output mode. Refer to the following for more
information:
Z – Three-stated pin.
OD (Open Drain) – Output pin with open drain.
Reset state:
No load allowed except for bypass capacitors.
Section 3.7, “Host Controller
–
–
–
–
–
–
– All pins with the PC option have pullup/down resistors disabled.
– All pins with the DC option have full drive strength.
Function1
VSSOSC
Section 3.2.3.2.5, “Host Interface Pins Pullup/down Enable Register
Section 3.2.3.2.6, “Host Interface Pins Pullup/down Control Register
Section 3.2.3.2.7, “Physical Layer Pins Pullup/down Enable Register
Section 3.2.3.2.8, “Physical Layer Pins Pullup/down Control Register
Section 3.2.3.2.3, “Host Interface and Physical Layer Pins Drive Strength Register
Section 3.2.3.2.4, “Physical Layer Pins Drive Strength Register
Pin
Section 3.7, “Host Controller
1
Detailed Signal Descriptions
A[1:6]/XADDR[19:14] — AMI Address Bus, HCS12 Expanded Address
Inputs
A[7:9]/ACS[0:2] — AMI Address Bus, HCS12 Expanded Address Inputs
4
4
Function2
(HIPPCR)”.)
Pin
-
-
1
Table 2-7. Pin Functions and Signal Properties (continued)
Function3
Pin
-
-
Interfaces” for more information. The pins can be configured to enable or
1
(HIPPER)” and
Powered
Interfaces” for more information. The pins can be configured to
MFR4200 Data Sheet, Rev. 0
by
-
-
Out
In/
-
-
Section 3.2.3.2.6, “Host Interface Pins Pullup/down
type
Pin
-
-
2,3
(PLPDSR)”
set
Re
(HIPPER)”
-
-
(HIPPCR)”
(PLPPER)”
(PLPPCR)”
Oscillator voltage power supply output
(nominally 2.5 V)
Oscillator voltage ground output
Section 3.2.3.2.5, “Host Interface
(HIPDSR)”
Functional Description
Freescale Semiconductor