mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 82

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mfr4200

Manufacturer Part Number
mfr4200
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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MFR4200 FlexRay Communication Controller
3.2.3.3.22
FlexRay Protocol Related Parameter – pExternRateCorrection
Address 0xF6
Reset
This register holds the absolute value of the initial external rate correction to be applied, together with the
internal clock synchronization value (see
(ECCR)”). The host may write this register in the configuration state only. The register value is expressed
in microticks.
3.2.3.3.23
Address 0xF8
Reset
EOCE — External Offset Correction Enable
0 – External offset correction disabled.
1 – External offset correction enabled.
82
Reserved
Reserved
ECR15
ERC7
rw*
rw*
15
15
7
7
r
r
undefined state
undefined state
External Rate Correction Register (ERCR)
External Correction Control Register (ECCR)
This register must be set before the NIT start of communication cycle x, in
order to affect the clock correction in the communication cycle x+1.
Reserved
Reserved
ECR14
ERC6
rw*
rw*
14
14
6
6
r
r
Figure 3-36. External Correction Control Register
Reserved
Reserved
Figure 3-35. External Rate Correction Register
ECR13
ERC5
rw*
rw*
13
13
5
5
r
r
MFR4200 Data Sheet, Rev. 0
Section 3.2.3.3.23, “External Correction Control Register
Reserved
Reserved
ECR12
ERC4
rw*
rw*
12
12
4
4
r
r
NOTE
Reserved
ECR11
ERCA
ERC3
rw*
rw*
11
11
rw
3
3
r
Reserved
ECR10
ERCE
ERC2
rwh
rw*
rw*
10
10
2
2
r
Reserved
EOCA
ECR9
ERC1
Freescale Semiconductor
rw*
rw*
rw
9
1
9
1
r
Reserved
EOCE
ECR8
ERC0
rwh
rw*
rw*
8
0
8
0
r

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