ch7019 Chrontel, ch7019 Datasheet - Page 25

• Manufacturer Part Number: ch7019
• Description: Ch7019 Tv Encoder / Lvds Transmitter
• Manufacturer: Chrontel

CHRONTEL
2.4
Multiplexed input data, sync and clock signals from the graphics controllers input to the CH7019 through one of the two
12-bit variable voltage input ports, D1[11:0] or D2[11:0]. Non-multiplexed 24-bit input data input through both of the
two input ports. For correct LVDS operation, the input data format must be selected to be IDFx=0, 1, 2, 3, 5, 8 or 9. Note
for 24-bit formats, IDF1 must be set equal to IDF2.
If the two 12-bit input ports are driven from different timing generators then data can be sent to both the LVDS data path
and the DACs in the TV data path. The DACs can output these data at 165 M pixels/sec to drive a second CRT monitor.
2.4.1
201-0000-048
Table 13: Signal Mapping for Single LVDS Channel
LVDS-Out
Single LVDS Channel Signal Mapping
Rev. 2.4,
12/18/2006
LDC[0](1)
LDC[0](2)
LDC[0](3)
LDC[0](4)
LDC[0](5)
LDC[0](6)
LDC[0](7)
LDC[1](1)
LDC[1](2)
LDC[1](3)
LDC[1](4)
LDC[1](5)
LDC[1](6)
LDC[1](7)
LDC[2](1)
LDC[2](2)
LDC[2](3)
LDC[2](4)
LDC[2](5)
LDC[2](6)
LDC[2](7)
HSYNC
VSYNC
18-bit
DE
R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
B2
B3
B4
B5
CH7019B
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