ch7019 Chrontel, ch7019 Datasheet - Page 58

• Manufacturer Part Number: ch7019
• Description: Ch7019 Tv Encoder / Lvds Transmitter
• Manufacturer: Chrontel

CHRONTEL
LVDS Power Down
LVDSPD (bit 6) of register LPD controls the LVDS power down. When LVDSPD is ‘0’ the LVDS path is ON, when
LVDSPD is ‘1’ the LVDS path is powered down.
LVDS Encoding 1 Register
LEOSWP (bit 1) of register LVDSE1 provides the added flexibility to swap odd/even samples output on the LVDS link.
LDM2D (bit 2) of register LVDSE1 selects the dithering function to minimize quantization noise by spreading it out
spatially. A ‘1’ turns on the 2D dither function, and a ‘0’ turns off the dither function.
LDD (bit 3) of register LVDSE1 bypasses the dither function. A ‘1’ bypasses the dither function. A ‘0’ does not bypass
the dither function.
LVDSDC (bit 4) of register LVDSE1 allows single or dual channel LVDS to be selected. If the bit is 1, dual channel is
selected. If the bit is 0, single channel is selected.
LVDS24 (bit 5) of register LVDSE1 selects LVDS 24 bit or 18 bit output format. A ‘1’ provides 24- bit output mode
and a ‘ 0’ provides 18- bit output mode.
LVDS Encoding 2 Register
58
DEFAULT:
DEFAULT:
DEFAULT:
SYMBOL:
SYMBOL:
SYMBOL:
TYPE:
TYPE:
TYPE:
BIT:
BIT:
BIT:
7
Reserved
Reserved Reserved
C5GP5
R/W
R/W
R/W
0
0
0
7
7
6
LVDSPD
C5GP4
R/W
R/W
R/W
0
6
0
6
0
5
Reserved Reserved Reserved Reserved Reserved Reserved
LVDS24 LVDSDC
C5GP3
R/W
R/W
R/W
0
5
0
5
0
4
Reserved
R/W
R/W
R/W
0
4
0
4
0
3
LA6RL
LDD
R/W
R/W
R/W
1
3
1
3
0
Symbol:
Address:
Bits:
Symbol:
Address:
Bits:
Symbol:
Address:
Bits:
201-0000-048
2
Reserved
LDM2D LEOSWP
R/W
R/W
R/W
0
2
1
2
0
1
LCNTLE LCNTLF
R/W
R/W
R/W
LPD
63h
1
LVDSE1
64h
5
LVDSE2
65h
6
Rev. 2.4, 12/18/2006
1
1
0
1
0
CH7019B
0
Reserved
R/W
R/W
R/W
1
0
1
0
0