ch7019 Chrontel, ch7019 Datasheet - Page 38

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ch7019

Manufacturer Part Number
ch7019
Description
Ch7019 Tv Encoder / Lvds Transmitter
Manufacturer
Chrontel
Datasheet

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CHRONTEL
CFF[1:0] (bits 5-4) of register FF control the filter used in the scaling and flicker reduction block applied to the
chrominance signal as shown in Table 21 below. A setting of ‘11’ applies a dot crawl reduction filter which can reduce
the ‘hanging dots’ effect of an NTSC composite video signal when displayed on a TV with a comb filter.
Scaling Ratio
5/4
1/1, 7/8, 5/6, 3/4, 5/7, 7/10
5/8
25/21
5/9
½
VOF[1:0] (bits 7-6) of register FF control the video output format. Must be set per the table below:
For the TV out DAC by-pass for RGB out, refer to DACBP (bit0 of Register 21h).
Refer to Table 12 in section 2.3.5 for TV Output DAC configuration.
Video Bandwidth Register
YCV[1:0] (bits 1-0) of register VBW control the filter used to limit the bandwidth of the luma signal in the CVBS output
signal. A table of –3dB bandwidth values is given in Table 23 below.
YSV[1:0] (bits 3-2) of register VBW control the filter used to limit the bandwidth of the luma signal in the S-Video
output signal. A table of –3dB bandwidth values is given in Table 23 below.
CBW (bit 4) of register VBW controls the filter used to limit the bandwidth of the chroma signal in the CVBS and S-
Video output signals. A table of –3dB bandwidth values is given in Table 23 below.
38
DEFAULT:
SYMBOL:
Table 21: Chroma Flicker Filter Control
TYPE:
BIT:
VBID
R/W
1
7
Table 22: TV Output Configurations
VOF1
0
0
1
1
6
CFRB
R/W
0
VOF0
1
0
1
0
00
2
2
2
2
3
3
5
CVBW
R/W
0
TV Output Configuration
YCrCb
Composite, S-Video
YPrPb (480I component HDTV set)
SCART + Composite
CFF Flicker Filter Settings (lines)
4
CBW
R/W
1
01
3
3
3
3
4
5
3
YSV1
R/W
1
10
3
4
4
4
5
5
2
YSV0
R/W
1
Symbol:
Address:
Bits:
201-0000-048
11
3
5
5
6
6
7
1
YCV1
R/W
1
VBW
02h
8
Rev. 2.4, 12/18/2006
CH7019B
0
YCV0
R/W
0

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