ch7019 Chrontel, ch7019 Datasheet - Page 72

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ch7019

Manufacturer Part Number
ch7019
Description
Ch7019 Tv Encoder / Lvds Transmitter
Manufacturer
Chrontel
Datasheet

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4.6
The LVDS specifications meet the requirements of ANSI/EIA/TIA-644. Refer to Figure 21 for definitions of parameters.
Note 1: Corresponds to maximum pixel rate f
72
|V
| V
OS
Symbol
t
|V
| V
V
LVDS Output Specifications
|V
| V
| - | V
| - |V
f
OS
LLC
t
RING
t
t
UI
OS
R
pixel rates greater than 108MHz.
F
t
t
*|
* |
|
|
OS
t
*|
* |
Description
Steady State Differential
Output Magnitude for logic 1
Steady State Differential
Output Magnitude for logic 0
Steady State Magnitude of
Difference between Logic 1
and 0 Outputs
Steady State Magnitude of
Offset Voltage for Logic 1
Steady State Magnitude of
Offset Voltage for Logic 0
Steady State Magnitude of
Offset Difference between
Logic States
LVDS Output Clock
Frequency
LVDS data unit time interval
LVDS data rise time
LVDS data fall time
Voltage ringing after transition
t
1.3ns < t
t
1.3ns < t
UI
UI
> 5ns
> 5ns
UI
UI
< 5ns
< 5ns
XCLK
100Ω differential load
100Ω differential load
100Ω differential load
Measured at center-
tap of two 50Ω
resistors connected
between outputs
Measured at center-
tap of two 50Ω
resistors connected
between outputs
Measured at center-
tap of two 50Ω
resistors connected
between outputs
25MHz < f
108MHz
100Ω and 5pF
differential load
20% -> 80% V
100Ω and 5pF
differential load
80% -> 20% V
100Ω and 5pF
differential load
Test Condition
for single channel operation. Dual channel operation is required for
LLC
<
SWING
SWING
1.125
1.125
Min
247
247
1.3
25
201-0000-048
Typ
0.3* t
0.3* t
V
1.375
1.375
Rev. 2.4, 12/18/2006
108
Max
20%
453
453
5.7
1.5
1.5
SWING
50
50
1
UI
UI
CH7019B
Unit
MHz
mV
mV
mV
mV
ns
ns
ns
ns
ns
V
V

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