DAC1408D650C1 NXP [NXP Semiconductors], DAC1408D650C1 Datasheet - Page 61

• Manufacturer Part Number: DAC1408D650C1
• Description: Dual 14-bit DAC up to 650 Msps 2, 4 or 8 interpolating
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 87.
Table 88.
Table 89.
DAC1408D650
Preliminary data sheet
Bit
7
6 to 5
4 to 2
1
0
Bit
1
0
Bit
7 to 4
3 to 0
Symbol
SEL_421_211
SEL_ILA[1:0]
SEL_LOCK[2:0]
SUP_LANE_SYN
EN_SCR
Symbol
DYN_ALIGN_ENA
FORCE_ALIGN
Symbol
MAN_ALIGN_LN1[3:0]
MAN_ALIGN_LN0[3:0]
ILA_CNTRL register (address 07h) bit description
FORCE_ALIGN register (address 08h) bit description
MAN_ALIGN_LN_0_1 register (address 09h) bit description
DAC1408D; up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A
All information provided in this document is subject to legal disclaimers.
Access
R/W
R/W
R/W
R/W
R/W
Access
R/W
R/W
Access
R/W
R/W
Rev. 02 — 11 August 2010
Value
0
1
00
01
10
11
000
001
010
011
100
101
0
1
0
1
Value
0
1
0
1
Value
00h
00h
Description
inter-lane alignment mode
inter-lane alignment trigger mode
inter-lane alignment start mode
inter-lane alignment enable
Description
dynamic re-alignment mode
lane alignment mode
Description
indicates alignment data-delay for lane 1 [1..15]
indicates alignment data-delay for lane 0 [1..15]
data descrambling
inter-lane alignment based on lane 3 : lane 2
and/or lane 1 : lane 0
inter-lane alignment based on ln3:ln0
inter-lane alignment is done after receiving
1 /A/-symbol
inter-lane alignment is done after receiving
2 /A/-symbols
inter-lane alignment is done after receiving
3 /A/-symbols
inter-lane alignment is done after receiving
4 /A/-symbols
inter-lane alignment may start only if all (4 or 2)
lanes are locked
inter-lane alignment may start if one of the (4 or 2)
lanes are locked
inter-lane alignment may start if lane 0 is locked
inter-lane alignment may start if lane 1 is locked
inter-lane alignment may start if lane 2 is locked
inter-lane alignment may start if lane 3 is locked
inter-lane alignment synchronization disabled
inter-lane alignment synchronization enabled
data descrambling disabled
enabled
no dynamic re-alignment
dynamic re-alignment (and monitoring) enabled
automatic lane alignment based on
/A/-symbols
manual lane alignment based on man_align_lnx
DAC1408D650
© NXP B.V. 2010. All rights reserved.
61 of 98