ATA6602-PLQW ATMEL [ATMEL Corporation], ATA6602-PLQW Datasheet - Page 158

• Manufacturer Part Number: ATA6602-PLQW
• Description: Microcontroller with LIN Transceiver, 5V Regulator and Watchdog
• Manufacturer: ATMEL [ATMEL Corporation]

4.14.10.9
158
ATA6602/ATA6603
Timer/Counter1 Interrupt Flag Register – TIFR1
• Bit 7, 6 – Res: Reserved Bits
• Bit 5 – ICF1: Timer/Counter1, Input Capture Flag
• Bit 4, 3 – Res: Reserved Bits
• Bit 2 – OCF1B: Timer/Counter1, Output Compare B Match Flag
• Bit 1 – OCF1A: Timer/Counter1, Output Compare A Match Flag
• Bit 0 – TOV1: Timer/Counter1, Overflow Flag
Initial Value
Read/Write
These bits are unused bits in the ATA6602/ATA6603, and will always read as zero.
This flag is set when a capture event occurs on the ICP1 pin. When the Input Capture Reg-
ister (ICR1) is set by the WGM13:0 to be used as the TOP value, the ICF1 Flag is set when
the counter reaches the TOP value.
ICF1 is automatically cleared when the Input Capture Interrupt Vector is executed. Alterna-
tively, ICF1 can be cleared by writing a logic one to its bit location.
These bits are unused bits in the ATA6602/ATA6603, and will always read as zero.
This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Output
Compare Register B (OCR1B).
Note that a Forced Output Compare (FOC1B) strobe will not set the OCF1B Flag.
OCF1B is automatically cleared when the Output Compare Match B Interrupt Vector is exe-
cuted. Alternatively, OCF1B can be cleared by writing a logic one to its bit location.
This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Output
Compare Register A (OCR1A).
Note that a Forced Output Compare (FOC1A) strobe will not set the OCF1A Flag.
OCF1A is automatically cleared when the Output Compare Match A Interrupt Vector is exe-
cuted. Alternatively, OCF1A can be cleared by writing a logic one to its bit location.
The setting of this flag is dependent of the WGM13:0 bits setting. In Normal and CTC
modes, the TOV1 Flag is set when the timer overflows. Refer to
the TOV1 Flag behavior when using another WGM13:0 bit setting.
TOV1 is automatically cleared when the Timer/Counter1 Overflow Interrupt Vector is exe-
cuted. Alternatively, TOV1 can be cleared by writing a logic one to its bit location.
Bit
R
7
–
0
R
6
–
0
ICF1
R/W
5
0
R
4
–
0
R
3
–
0
OCF1B
R/W
2
0
Table 4-56 on page 154
OCF1A
R/W
1
0
TOV1
R/W
0
0
4921C–AUTO–01/07
TIFR1
for