ATA6602-PLQW ATMEL [ATMEL Corporation], ATA6602-PLQW Datasheet - Page 59

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ATA6602-PLQW

Manufacturer Part Number
ATA6602-PLQW
Description
Microcontroller with LIN Transceiver, 5V Regulator and Watchdog
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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4.7
4921C–AUTO–01/07
Power Management and Sleep Modes
Table 4-17.
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
To enter any of the five sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select
which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, or Standby) will be
activated by the SLEEP instruction. See
interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted
for four cycles in addition to the start-up time, executes the interrupt routine, and resumes exe-
cution from the instruction following SLEEP. The contents of the Register File and SRAM are
unaltered when the device wakes up from sleep. If a reset occurs during sleep mode, the MCU
wakes up and executes from the Reset Vector.
Figure 4-11 on page 48
distribution. The figure is helpful in selecting an appropriate sleep mode.
CLKPS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Clock Prescaler Select
CLKPS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
presents the different clock systems in the ATA6602/ATA6603, and their
CLKPS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Table 4-18 on page 60
CLKPS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
ATA6602/ATA6603
for a summary. If an enabled
Clock Division Factor
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
128
256
16
32
64
1
2
4
8
59

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