ATA6602-PLQW ATMEL [ATMEL Corporation], ATA6602-PLQW Datasheet - Page 249

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ATA6602-PLQW

Manufacturer Part Number
ATA6602-PLQW
Description
Microcontroller with LIN Transceiver, 5V Regulator and Watchdog
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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4.19.8.3
4921C–AUTO–01/07
Slave Receiver Mode
Figure 4-91. Formats and States in the Master Receiver Mode
In the Slave Receiver mode, a number of data bytes are received from a Master Transmitter
(see
are zero or are masked to zero.
Figure 4-92. Data Transfer in Slave Receiver Mode
Successfull
reception
from a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
SDA
SCL
Figure
4-92). All the status codes mentioned in this section assume that the prescaler bits
From master to slave
From slave to master
$08
S
Device 1
RECEIVER
SLAVE
SLA
TRANSMITTER
Device 2
R
MASTER
MR
A or A
DATA
$40
$48
$38
$68
A
A
A
$78
Other master
Other master
continues
continues
n
P
Device 3
$B0
DATA
A
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Serial Bus. The
prescaler bits are zero or masked to zero
........
$50
$38
To corresponding
states in slave mode
A
A
Other master
ATA6602/ATA6603
DATA
continues
Device n
$58
V
A
CC
$10
P
R S
R1
SLA
R2
W
R
MT
249

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