C8051F540-TB Silicon Laboratories Inc, C8051F540-TB Datasheet - Page 116
C8051F540-TB
Manufacturer Part Number
C8051F540-TB
Description
BOARD PROTOTYPE W/C8051F540
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F540-TB
Contents
Board
Processor To Be Evaluated
C8051F54x
Processor Series
C8051F54x
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F54x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1672
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C8051F54x
SFR Definition 13.7. IT01CF: INT0/INT1 Configuration
SFR Address = 0xE4; SFR Page = 0x0F
116
Name
Reset
6:4
2:0
Bit
Type
7
3
Bit
IN1SL[2:0] INT1 Port Pin Selection Bits.
IN0SL[2:0] INT0 Port Pin Selection Bits.
IN1PL
IN0PL
Name
IN1PL
R/W
7
0
INT1 Polarity.
0: INT1 input is active low.
1: INT1 input is active high.
These bits select which Port pin is assigned to INT1. Note that this pin assignment is
independent of the Crossbar; INT1 will monitor the assigned Port pin without disturb-
ing the peripheral that has been assigned the Port pin via the Crossbar. The Crossbar
will not assign the Port pin to a peripheral if it is configured to skip the selected pin.
000: Select P1.0
001: Select P1.1
010: Select P1.2
011: Select P1.3
100: Select P1.4
101: Select P1.5
110: Select P1.6
111: Select P1.7
INT0 Polarity.
0: INT0 input is active low.
1: INT0 input is active high.
These bits select which Port pin is assigned to INT0. Note that this pin assignment is
independent of the Crossbar; INT0 will monitor the assigned Port pin without disturb-
ing the peripheral that has been assigned the Port pin via the Crossbar. The Crossbar
will not assign the Port pin to a peripheral if it is configured to skip the selected pin.
000: Select P1.0
001: Select P1.1
010: Select P1.2
011: Select P1.3
100: Select P1.4
101: Select P1.5
110: Select P1.6
111: Select P1.7
6
0
IN1SL[2:0]
R/W
5
0
Rev. 1.1
4
0
Function
IN0PL
R/W
3
0
2
0
IN0SL[2:0]
R/W
1
0
0
0
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