C8051F540-TB Silicon Laboratories Inc, C8051F540-TB Datasheet - Page 62
C8051F540-TB
Manufacturer Part Number
C8051F540-TB
Description
BOARD PROTOTYPE W/C8051F540
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F540-TB
Contents
Board
Processor To Be Evaluated
C8051F54x
Processor Series
C8051F54x
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F54x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1672
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C8051F54x
SFR Definition 7.1. REF0CN: Reference Control
SFR Address = 0xD1; SFR Page = 0x00
62
Name
Reset
7:6
Bit
Type
5
4
3
2
1
0
Bit
Unused
TEMPE
ZTCEN
REFBE
REFSL
REFLV
BIASE
Name
R
7
0
Read = 00b; Write = don’t care.
Zero Temperature Coefficient Bias Enable Bit.
This bit must be set to 1b before entering oscillator suspend mode.
0: ZeroTC Bias Generator automatically enabled when required.
1: ZeroTC Bias Generator forced on.
Voltage Reference Output Level Select.
This bit selects the output voltage level for the internal voltage reference
0: Internal voltage reference set to 1.5 V.
1: Internal voltage reference set to 2.20 V.
Voltage Reference Select.
This bit selects the ADCs voltage reference.
0: V
1: V
Temperature Sensor Enable Bit.
0: Internal Temperature Sensor off.
1: Internal Temperature Sensor on.
Internal Analog Bias Generator Enable Bit.
0: Internal Bias Generator off.
1: Internal Bias Generator on.
On-chip Reference Buffer Enable Bit.
0: On-chip Reference Buffer off.
1: On-chip Reference Buffer on. Internal voltage reference driven on the V
REF
DD
R
used as voltage reference.
6
0
pin used as voltage reference.
ZTCEN
R
5
0
REFLV
Rev. 1.1
R
4
0
Function
REFSL
R/W
3
0
TEMPE
R/W
2
0
BIASE
R/W
1
0
REF
REFBE
pin.
R/W
0
0
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