C8051F540-TB Silicon Laboratories Inc, C8051F540-TB Datasheet - Page 93
![BOARD PROTOTYPE W/C8051F540](/photos/9/25/92559/c8051f540-tb_sml.jpg)
C8051F540-TB
Manufacturer Part Number
C8051F540-TB
Description
BOARD PROTOTYPE W/C8051F540
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F540-TB
Contents
Board
Processor To Be Evaluated
C8051F54x
Processor Series
C8051F54x
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F54x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1672
- Current page: 93 of 274
- Download datasheet (3Mb)
On exit from the PCA interrupt service routine, the CIP-51 will return to the SPI0 ISR. On execution of the
RETI instruction, SFR Page 0x00 used to access the PCA registers will be automatically popped off of the
SFR Page Stack, and the contents of the SFRNEXT register will be moved to the SFRPAGE register. Soft-
ware in the SPI0 ISR can continue to access SFRs as it did prior to the PCA interrupt. Likewise, the con-
tents of SFRLAST are moved to the SFRNEXT register. Recall this was the SFR Page value 0x0F being
used to access SMB0ADR before the SPI0 interrupt occurred. See Figure 12.5.
Figure 12.4. SFR Page Stack Upon PCA Interrupt Occurring During a SPI0 ISR
SFRPAGE
SFRNEXT
SFRNEXT
pushed to
SFRLAST
pushed to
(SMB0ADR)
SFRPAGE on PCA
pushed on stack in
SFR Page 0x00
(PCA0)
Automatically
(SPI0)
0x0F
0x00
0x00
interrupt
Rev. 1.1
SFRPAGE
SFRNEXT
SFRLAST
C8051F54x
93
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