C8051F540-TB Silicon Laboratories Inc, C8051F540-TB Datasheet - Page 95
![BOARD PROTOTYPE W/C8051F540](/photos/9/25/92559/c8051f540-tb_sml.jpg)
C8051F540-TB
Manufacturer Part Number
C8051F540-TB
Description
BOARD PROTOTYPE W/C8051F540
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F540-TB
Contents
Board
Processor To Be Evaluated
C8051F54x
Processor Series
C8051F54x
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F54x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1672
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C8051F54x
SFR Page 0x00
Automatically
popped off of the
stack on return from
interrupt
0x0F
SFRPAGE
(SMB0ADR)
SFRNEXT
popped to
SFRPAGE
SFRNEXT
SFRLAST
Figure 12.6. SFR Page Stack Upon Return From SPI0 Interrupt
In the example above, all three bytes in the SFR Page Stack are accessible via the SFRPAGE, SFRNEXT,
and SFRLAST special function registers. If the stack is altered while servicing an interrupt, it is possible to
return to a different SFR Page upon interrupt exit than selected prior to the interrupt call. Direct access to
the SFR Page stack can be useful to enable real-time operating systems to control and manage context
switching between multiple tasks.
Push operations on the SFR Page Stack only occur on interrupt service, and pop operations only occur on
interrupt exit (execution on the RETI instruction). The automatic switching of the SFRPAGE and operation
of the SFR Page Stack as described above can be disabled in software by clearing the SFR Automatic
Page Enable Bit (SFRPGEN) in the SFR Page Control Register (SFR0CN). See SFR Definition 12.1.
Rev. 1.1
95
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