C8051F540-TB Silicon Laboratories Inc, C8051F540-TB Datasheet - Page 185

BOARD PROTOTYPE W/C8051F540

C8051F540-TB

Manufacturer Part Number
C8051F540-TB
Description
BOARD PROTOTYPE W/C8051F540
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F540-TB

Contents
Board
Processor To Be Evaluated
C8051F54x
Processor Series
C8051F54x
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F54x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1672
LIN Register Definition 19.9. LIN0DIV: LIN0 Divider Register
Indirect Address = 0x0C
LIN Register Definition 19.10. LIN0MUL: LIN0 Multiplier Register
Indirect Address = 0x0D
Name
Reset
Name
Reset
Bit
7:0
Bit
7:6 PRESCL[1:0] LIN Baud Rate Prescaler Bits.
5:1
Type
Type
0
Bit
Bit
LINMUL[4:0] LIN Baud Rate Multiplier Bits.
DIVLSB
Name
Name
DIV9
PRESCL[1:0]
7
1
7
1
R/W
LIN Baud Rate Divider Least Significant Bits.
The 8 least significant bits for the baud rate divider. The 9th and most significant bit
is the DIV9 bit (LIN0MUL.0). The valid range for the divider is 200 to 511.
These bits are the baud rate prescaler bits.
These bits are the baud rate multiplier bits. These bits are not used in slave mode.
LIN Baud Rate Divider Most Significant Bit.
The most significant bit of the baud rate divider. The 8 least significant bits are in
LIN0DIV. The valid range for the divider is 200 to 511.
6
1
6
1
5
1
5
1
Rev. 1.1
4
1
4
1
DIVLSB[3:0]
R/W
LINMUL[4:0]
Function
Function
R/W
3
1
3
1
2
1
2
1
C8051F54x
1
1
1
1
DIV9
R/W
0
1
0
1
185

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