PIC12HV615-I/SN Microchip Technology, PIC12HV615-I/SN Datasheet - Page 15

• Manufacturer Part Number: PIC12HV615-I/SN
• Description: IC PIC MCU FLASH 1KX14 8SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12HV615-I/SN

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 8-SOIC (3.9mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 5
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12H
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS-232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162083 - HEADER MPLAB ICD2 PIC16F616 8/14
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 2-2:
 2010 Microchip Technology Inc.
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note
Addr
1:
2:
3:
INDF
TMR0
PCL
STATUS
FSR
GPIO
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
TMR2
T2CON
CCPR1L
CCPR1H
CCP1CON
PWM1CON
ECCPAS
VRCON
CMCON0
CMCON1
ADRESH
ADCON0
Name
—
—
—
—
—
—
—
—
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
IRP and RP1 bits are reserved, always maintain these bits clear.
Read only register.
PIC12F615/617/HV615 only.
(3)
(3)
(2, 3)
(3)
(3)
(3)
(3)
(3)
(3)
PIC12F615/617/HV615 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module’s Register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module Register
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
Unimplemented
Unimplemented
Most Significant 8 bits of the left shifted A/D result or 2 bits of right shifted result
ECCPASE
CMVREN
T1GINV
PRSEN
CMON
ADFM
IRP
Bit 7
P1M
GIE
—
—
—
—
—
(1)
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0
ECCPAS2 ECCPAS1 ECCPAS0
TMR1GE
RP1
COUT
VCFG
PDC6
Bit 6
PEIE
ADIF
—
—
—
—
—
PIC12F609/615/617/12HV609/615
(1)
T1CKPS1
CCP1IF
DC1B1
CMOE
PDC5
Bit 5
GP5
T0IE
VRR
RP0
—
—
—
T1CKPS0 T1OSCEN
CMPOL
FVREN
DC1B0
T1ACS
PDC4
CHS2
Bit 4
INTE
GP4
TO
—
Write Buffer for upper 5 bits of Program Counter
CCP1M3
PSSAC1
CMHYS
PDC3
CHS1
GPIE
CMIF
Bit 3
GP3
VR3
PD
—
—
TMR2ON
CCP1M2
T1SYNC
PSSAC0
PDC2
CHS0
Bit 2
CMR
GP2
T0IF
VR2
—
—
Z
GO/DONE
T2CKPS1
TMR1CS
CCP1M1
PSSBD1
TMR2IF
T1GSS
PDC1
Bit 1
INTF
GP1
VR1
DC
—
—
T2CKPS0 -000 0000 66, 116
CMSYNC
TMR1ON
CCP1M0
PSSBD0
TMR1IF
CMCH
ADON
PDC0
GPIF
Bit 0
GP0
VR0
C
xxxx xxxx 25, 116
xxxx xxxx 53, 116
0000 0000 25, 116
0001 1xxx 18, 116
xxxx xxxx 25, 116
--x0 x000 43, 116
---0 0000 25, 116
0000 0000 20, 116
-00- 0-00 22, 116
xxxx xxxx 57, 116
xxxx xxxx 57, 116
0000 0000 62, 116
0000 0000 65, 116
XXXX XXXX 90, 116
XXXX XXXX 90, 116
0-00 0000 89, 116
0000 0000
0000 0000
0-00 0000 76, 116
0000 -0-0 72, 116
---0 0-10 73, 116
xxxx xxxx 85, 116
00-0 0000 84, 116
POR, BOR
Value on
DS41302D-page 15
—
—
—
—
—
—
—
—
105,
102,
Page
116
116
—
—
—
—
—
—
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