PIC12HV615-I/SN Microchip Technology, PIC12HV615-I/SN Datasheet - Page 46

• Manufacturer Part Number: PIC12HV615-I/SN
• Description: IC PIC MCU FLASH 1KX14 8SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12HV615-I/SN

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 8-SOIC (3.9mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 5
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12H
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS-232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162083 - HEADER MPLAB ICD2 PIC16F616 8/14
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC12F609/615/617/12HV609/615
REGISTER 5-5:
REGISTER 5-6:
DS41302D-page 46
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3
bit 2-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
Note 1:
U-0
U-0
—
—
2:
3:
4:
2:
Global GPPU must be enabled for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in Output mode (TRISIO = 0).
The GP3 pull-up is enabled when configured as MCLR in the Configuration Word, otherwise it is disabled
as an input and reads as ‘0’.
WPU<5:4> always reads ‘1’ in XT, HS and LP Oscillator modes.
Global Interrupt Enable (GIE) must be enabled for individual interrupts to be recognized.
IOC<5:4> always reads ‘1’ in XT, HS and LP Oscillator modes.
Unimplemented: Read as ‘0’
WPU<5:4>: Weak Pull-up Control bits
1 = Pull-up enabled
0 = Pull-up disabled
WPU<3>: Weak Pull-up Register bit
WPU<2:0>: Weak Pull-up Control bits
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
IOC<5:0>: Interrupt-on-change GPIO Control bit
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
U-0
U-0
—
—
WPU: WEAK PULL-UP GPIO REGISTER
IOC: INTERRUPT-ON-CHANGE GPIO REGISTER
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
WPU5
R/W-1
R/W-0
IOC5
R/W-1
WPU4
R/W-0
IOC4
(3)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
IOC3
U-0
—
R/W-1
WPU2
R/W-0
IOC2
 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
WPU1
R/W-1
R/W-0
IOC1
R/W-1
WPU0
R/W-0
IOC0
bit 0
bit 0