PIC12HV615-I/SN Microchip Technology, PIC12HV615-I/SN Datasheet - Page 43

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PIC12HV615-I/SN

Manufacturer Part Number
PIC12HV615-I/SN
Description
IC PIC MCU FLASH 1KX14 8SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12HV615-I/SN

Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
8-SOIC (3.9mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC12H
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS-232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
5
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162083 - HEADER MPLAB ICD2 PIC16F616 8/14
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12HV615-I/SN
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
5.0
There are as many as six general purpose I/O pins
available. Depending on which peripherals are enabled,
some or all of the pins may not be available as general
purpose I/O. In general, when a peripheral is enabled,
the associated pin may not be used as a general
purpose I/O pin.
5.1
GPIO is a 6-bit wide port with 5 bidirectional and 1 input-
only pin. The corresponding data direction register is
TRISIO (Register 5-2). Setting a TRISIO bit (= 1) will
make the corresponding GPIO pin an input (i.e., disable
the output driver). Clearing a TRISIO bit (= 0) will make
the corresponding GPIO pin an output (i.e., enables
output driver and puts the contents of the output latch on
the selected pin). The exception is GP3, which is input
only and its TRIS bit will always read as ‘1’. Example 5-
1 shows how to initialize GPIO.
REGISTER 5-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
Note:
U-0
I/O PORT
GPIO and the TRISIO Registers
GPIO = PORTA
TRISIO = TRISA
Unimplemented: Read as ‘0’
GP<5:0>: GPIO I/O Pin bit
1 = GPIO pin is > V
0 = GPIO pin is < V
U-0
GPIO: GPIO REGISTER
W = Writable bit
‘1’ = Bit is set
PIC12F609/615/617/12HV609/615
IH
IL
R/W-x
GP5
R/W-x
GP4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
Reading the GPIO register (Register 5-1) reads the
status of the pins, whereas writing to it will write to the
PORT latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then
written to the PORT data latch. GP3 reads ‘0’ when
MCLRE = 1.
The TRISIO register controls the direction of the
GPIO pins, even when they are being used as analog
inputs. The user must ensure the bits in the TRISIO
register are maintained set when using them as analog
inputs. I/O pins configured as analog input always read
‘0’.
EXAMPLE 5-1:
GP3
R-x
BANKSEL
CLRF
BANKSEL
CLRF
MOVLW
MOVWF
Note:
The ANSEL register must be initialized to
configure an analog channel as a digital
input. Pins configured as analog inputs will
read ‘0’ and cannot generate an interrupt.
GPIO
GPIO
ANSEL
ANSEL
0Ch
TRISIO
R/W-x
GP2
INITIALIZING GPIO
;
;Init GPIO
;
;digital I/O, ADC clock
;setting ‘don’t care’
;Set GP<3:2> as inputs
;and set GP<5:4,1:0>
;as outputs
x = Bit is unknown
R/W-x
GP1
DS41302D-page 43
R/W-x
GP0
bit 0

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