LPC3230FET296/01,5 NXP Semiconductors, LPC3230FET296/01,5 Datasheet - Page 15

• Manufacturer Part Number: LPC3230FET296/01,5
• Description: IC ARM9 MCU 256K 296-TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC32x0r

Specifications of LPC3230FET296/01,5

• Package / Case: 296-TFBGA
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 266MHz
• Connectivity: EBI/EMI, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, Motor Control PWM, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: ROMless
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 3.6 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC32
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 256 KB
• Interface Type: EMC
• Maximum Clock Frequency: 266 MHz
• Number Of Timers: 6
• Operating Supply Voltage: 1.31 V to 1.39 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 3 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4964; 935290764551

NXP Semiconductors
Table 4.
LPC3220_30_40_50_1
Preliminary data sheet
Symbol
JTAG_NTRST
JTAG_RTCK
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
KEY_COL0/
ENET_TX_CLK
KEY_COL1/
ENET_RX_CLK/
ENET_REF_CLK
KEY_COL2/
ENET_RX_ER
KEY_COL3/
ENET_CRS
KEY_COL4/
ENET_RXD0
KEY_COL5/
ENET_RXD1
KEY_ROW0/
ENET_TX_ER
KEY_ROW1/
ENET_TXD2
KEY_ROW2/
ENET_TXD3
KEY_ROW3/
ENET_TX_EN
KEY_ROW4/
ENET_TXD0
KEY_ROW5/
ENET_TXD1
MS_BS/MAT2[1]
MS_DIO0/MAT0[0]
MS_DIO1/
MAT0[1]
MS_DIO2/
MAT0[2]
Pin description
Pin
H17
H18
H14
J16
J15
G18
F15
E16
D17
D18
G15
F16
E15
E14
F14
D16
C17
C18
A6
A8
A7
B8
…continued
Power supply
domain
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
Rev. 01 — 6 February 2009
Type
I: PU
O
I
I: PU
O
I: PU
I
I
I
I
I
I
I
I
I
I
I
I
I
I/O T
I/O T
I/O T
I/O T
I/O T
I/O T
I/O T
I/O T
I/O T
I/O T
I/O T
I/O T
I/O: P
O
I/O: P
O
I/O: P
O
I/O: P
O
Description
JTAG1 reset input
JTAG1 return clock out
JTAG1 clock input
JTAG1 data input
JTAG1 data out
TAG1 test mode select input
Keyscan column 0 input
Ethernet transmit clock
Keyscan column 1 input,
Ethernet receive clock (MII mode)
Ethernet reference clock (RMII mode)
Keyscan column 2 input
Ethernet receive error input
Keyscan column 3 input
Ethernet carrier sense input
Keyscan column 4 input
Ethernet receive data 0
Keyscan column 5 input
Ethernet receive data 1
Keyscan row 0 out
Ethernet transmit error
Keyscan row 1 out
Ethernet transmit data 2
Keyscan row 2 out
Ethernet transmit data 3
Keyscan row 3 out
Ethernet transmit enable
Keyscan row 4 out
Ethernet transmit data 0
Keyscan row 5 out
Ethernet transmit data 1
MS/SD card command out
Timer 2 match output 1
MS/SD card data 0
Timer 0 match output 0
MS/SD card data 1
Timer 0 match output 1
MS/SD card data 2
Timer 0 match output 2
LPC3220/30/40/50
16/32-bit ARM microcontrollers
© NXP B.V. 2009. All rights reserved.
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