LPC3230FET296/01,5 NXP Semiconductors, LPC3230FET296/01,5 Datasheet - Page 48

• Manufacturer Part Number: LPC3230FET296/01,5
• Description: IC ARM9 MCU 256K 296-TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC32x0r

Specifications of LPC3230FET296/01,5

• Package / Case: 296-TFBGA
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 266MHz
• Connectivity: EBI/EMI, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, Motor Control PWM, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: ROMless
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 3.6 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC32
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 256 KB
• Interface Type: EMC
• Maximum Clock Frequency: 266 MHz
• Number Of Timers: 6
• Operating Supply Voltage: 1.31 V to 1.39 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 3 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4964; 935290764551

NXP Semiconductors
Table 8.
V
[1]
[2]
[3]
[4]
[5]
[6]
[7]
LPC3220_30_40_50_1
Preliminary data sheet
Symbol
V
C
E
E
E
E
E
R
DDA(3V3)
IA
D
L(adj)
O
G
T
ia
vsi
Conditions: V
The ADC is monotonic; there are no missing codes.
The differential linearity error (E
The integral non-linearity (E
appropriate adjustment of gain and offset errors. See
The offset error (E
ideal curve. See
The gain error (E
error, and the straight line which fits the ideal transfer curve. See
The absolute error (E
and the ideal transfer curve. See
= 3.3 V; T
ADC static characteristics
Parameter
analog input voltage
analog input capacitance
differential linearity error
integral non-linearity
offset error
gain error
absolute error
voltage source interface resistance
SSA
10.2 ADC static characteristics
Figure
amb
G
= 0 V (on pin VSS_AD); V
O
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
T
= 25 C unless otherwise specified; ADC clock frequency 4.5 MHz.
) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated ADC
4.
L(adj)
D
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
) is the difference between the actual step width and the ideal step width. See
Figure
4.
DDA(3V3)
Rev. 01 — 6 February 2009
= 3.3 V (on pin VDD_AD).
Figure
Conditions
4.
Figure
4.
[1][2][3]
[1][4]
[1][5]
[1][6]
[1][7]
Min
0
-
-
-
-
-
-
-
LPC3220/30/40/50
16/32-bit ARM microcontrollers
Typ
-
-
-
0.5
0.6
1
0.3
Max
V
1
40
Figure
1
1
3
0.6
4
DDA(3V3)
© NXP B.V. 2009. All rights reserved.
4.
Unit
V
pF
LSB
LSB
LSB
%
LSB
k
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