LPC3230FET296/01,5 NXP Semiconductors, LPC3230FET296/01,5 Datasheet - Page 50

IC ARM9 MCU 256K 296-TFBGA

LPC3230FET296/01,5

Manufacturer Part Number
LPC3230FET296/01,5
Description
IC ARM9 MCU 256K 296-TFBGA
Manufacturer
NXP Semiconductors
Series
LPC32x0r
Datasheets

Specifications of LPC3230FET296/01,5

Package / Case
296-TFBGA
Core Processor
ARM9
Core Size
16/32-Bit
Speed
266MHz
Connectivity
EBI/EMI, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, Motor Control PWM, PWM, WDT
Number Of I /o
51
Program Memory Type
ROMless
Ram Size
256K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC32
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
256 KB
Interface Type
EMC
Maximum Clock Frequency
266 MHz
Number Of Timers
6
Operating Supply Voltage
1.31 V to 1.39 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 3 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4964
935290764551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC3230FET296/01,5
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
11. Dynamic characteristics
Table 9.
T
[1]
[2]
[3]
Table 10.
C
LPC3220_30_40_50_1
Preliminary data sheet
Symbol
Reset
t
External clock
f
Port pins
t
t
Symbol
Common to read and write cycles
T
t
Read cycle parameters
t
t
t
t
t
t
t
t
t
t
t
t
Write cycle parameters
t
t
t
t
w(RESET)ext
ext
r
f
CSLAV
OELAV
BLSLAV
CSLOEL
CSLBLSL
OELOEH
BLSLBLSH
su(DQ)
h(DQ)
CSHOEH
CSHBLSH
OEHANV
BLSHANV
CSLDV
CSLWEL
CSLBLSL
WELDV
amb
L
CLCL
= 25 pF, T
Parameters are valid over operating temperature range unless otherwise specified.
After supply voltages are stable
Supplied by an external crystal.
= 40 C to +85 C, unless otherwise specified.
Dynamic characteristics
Dynamic characteristics: static external memory interface
Parameter
clock cycle time
CS LOW to address valid time
OE LOW to address valid time
BLS LOW to address valid time
CS LOW to OE LOW time
CS LOW to BLS LOW time
OE LOW to OE HIGH time
BLS LOW to BLS HIGH time
data input/output set-up time
data input/output hold time
CS HIGH to OE HIGH time
CS HIGH to BLS HIGH time
OE HIGH to address invalid time
BLS HIGH to address invalid time
CS LOW to data valid time
CS LOW to WE LOW time
CS LOW to BLS LOW time
WE LOW to data valid time
amb
11.1 Clocking and I/O port pins
11.2 Static memory controller
= 20 C, V
Parameter
external RESET pulse width
external clock frequency
rise time
fall time
DD(EMC)
= 1.8 V.
Rev. 01 — 6 February 2009
[1]
[8]
Notes Min
Conditions
[4][5]
[4][5]
[3]
[4]
[4]
[4]
[8]
[6]
[6]
[6]
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ
9.6
0
0
0
0 + WAITOEN
0 + WAITOEN
(WAITRD
(WAITRD
<tbd>
0
0
0
1
1
0
(WAITWEN + 1)
(WAITWEN + 1)
0
[2]
[3]
WAITOEN
WAITOEN
T
T
(WAITWEN + 1)
CLCL
CLCL
Min
10
1
-
-
LPC3220/30/40/50
WAITOEN + 1)
WAITOEN + 1)
16/32-bit ARM microcontrollers
T
T
T
T
CLCL
CLCL
CLCL
CLCL
T
T
CLCL
CLCL
T
Typ
-
13
5
5
CLCL
T
T
CLCL
CLCL
© NXP B.V. 2009. All rights reserved.
Max
-
20
-
-
Max
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
50 of 73
Unit
ms
MHz
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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