LPC3230FET296/01,5 NXP Semiconductors, LPC3230FET296/01,5 Datasheet - Page 61

• Manufacturer Part Number: LPC3230FET296/01,5
• Description: IC ARM9 MCU 256K 296-TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC32x0r

Specifications of LPC3230FET296/01,5

• Package / Case: 296-TFBGA
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 266MHz
• Connectivity: EBI/EMI, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, Motor Control PWM, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: ROMless
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 3.6 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC32
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 256 KB
• Interface Type: EMC
• Maximum Clock Frequency: 266 MHz
• Number Of Timers: 6
• Operating Supply Voltage: 1.31 V to 1.39 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 3 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4964; 935290764551

NXP Semiconductors
Table 17.
T
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
LPC3220_30_40_50_1
Preliminary data sheet
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
DS
IR
RC
REA
REH
RHOH
RHZ
RP
RR
WB
WC
WH
WHR
WP
REHRBL
amb
T
Rsu = bitfield R_SETUP[3:0] in register SLC_TAC[3:0] for reads
Rh = bitfield R_HOLD[3:0] in register SLC_TAC[7:4] for reads
Rw = bitfield R_WIDTH[3:0] in register SLC_TAC[11:8] for reads
Rb = bitfield R_RDY[3:0] in register SLC_TAC[15:12] for reads
Wsu = bitfield W_SETUP[3:0] in register SLC_TAC[19:16] for writes
Wh = bitfield W_HOLD[3:0] in register SLC_TAC[23:20] for writes
Ww = bitfield W_WIDTH[3:0] in register SLC_TAC[27:24] for writes
Wb = bitfield W_RDY[3:0] in register SLC_TAC[31:28] for writes
= 40 C to +85 C.
HCLK
= 1/HCLK
Parameter
data set-up time
output high-impedance to RE
LOW time
RE cycle time
RE access time
RE high hold time
RE HIGH to output hold time
RE HIGH to output
high-impedance time
RE pulse width
ready to RE LOW time
WE HIGH to R/B LOW time
WE cycle time
WE HIGH hold time
WE HIGH to RE LOW time
WE pulse width
RE HIGH to R/B LOW time
Dynamic characteristics of SLC NAND flash memory controller
Conditions
output from
NAND
controller; read
output from
NAND
controller;
write
read
write
read
read
read
input hold for
flash
controller; read
input hold for
flash
controller;
write
read
read
read
write
write
write
write
write
write
Rev. 01 — 6 February 2009
[1][2][4][6][8]
[1][2][6]
[1][2]
[1][4]
[1][2][3]
[1]
[1][4]
[1][2][3]
[1][8]
[1][6][7][8]
[1][6][7]
[1][6][7]
[1][8]
[1][8]
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
…continued
LPC3220/30/40/50
Typ
T
T
T
T
T
T
T
0
0
T
T
T
T
T
T
T
T
T
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
16/32-bit ARM microcontrollers
(Rsu + Rw)
(Wsu + Ww)
Rsu
Wsu
(Rsu + Rw + Rh)
Rw
(Rsu + Rh)
Rh
Rw
Rsu
Ww
(Wsu + Ww + Wh) -
(Wsu + Wh)
(Wsu + Wh)
Ww
Ww
© NXP B.V. 2009. All rights reserved.
Max Unit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
61 of 73
ns
ns
ns
ns
ns
ns
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns