R5F21256SNFP#U0 Renesas Electronics America, R5F21256SNFP#U0 Datasheet - Page 224
R5F21256SNFP#U0
Manufacturer Part Number
R5F21256SNFP#U0
Description
IC R8C MCU FLASH 32K 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21246SDFPU0.pdf
(61 pages)
3.R5F21246SDFPU0.pdf
(527 pages)
Specifications of R5F21256SNFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21256SNFP#U0R5F21256SNFP#ES
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 14.54
Timer RD I/O Control Register Ci (i = 0 or 1)
b7 b6 b5 b4
NOTES:
1.
2.
0
To select 1 (the TRDGRCi register is used as a buffer register of the TRDGRAi register) for this bit by the BFCi bit in
the TRDMR register, set the IOC2 bit in the TRDIORCi register to the same value as the IOA2 bit in the TRDIORAi
register.
To select 1 (the TRDGRDi register is used as a buffer register of the TRDGRBi register) for this bit by the BFDi bit in
the TRDMR register, set the IOD2 bit in the TRDIORCi register to the same value as the IOB2 bit in the TRDIORAi
register.
Feb 29, 2008
b3 b2
0
Registers TRDIORC0 to TRDIORC1 in Output Compare Function
b1 b0
TRDIORC0
TRDIORC1
Bit Symbol
Symbol
IOC0
IOC1
IOC2
IOC3
IOD0
IOD1
IOD2
IOD3
Page 205 of 485
TRDGRC control bits
TRDGRC mode select bit
TRDGRC register function
select bit
TRDGRD control bits
TRDGRD mode select bit
TRDGRD register function
select bit
Address
Bit Name
0142h
0152h
(1)
(2)
b1 b0
0 0 : Disable pin output by compare match
0 1 : “L” output at compare match w ith
1 0 : “H” output at compare match w ith
1 1 : Toggle output by compare match
b5 b4
0 0 : Disable pin output by compare match
0 1 : “L” output at compare match w ith
1 0 : “H” output at compare match w ith
1 1 : Toggle output by compare match
Set to 0 (output compare) in the output compare
function.
0 : TRDIOA output register
1 : General register or buffer register
Set to 0 (output compare) in the output compare
function.
0 : TRDIOB output register
1 : General register or buffer register
(Refer to 14.3.6.1 Changing Output Pins in
Registers TRDGRCi (i = 0 or 1) and
TRDGRDi. )
(Refer to 14.3.6.1 Changing Output Pins in
Registers TRDGRCi (i = 0 or 1) and
TRDGRDi. )
the TRDGRCi register
the TRDGRCi register
w ith the TRDGRCi register
the TRDGRDi register
the TRDGRDi register
w ith the TRDGRDi register
After Reset
10001000b
10001000b
Function
14. Timers
RW
RW
RW
RW
RW
RW
RW
RW
RW
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