R5F21256SNFP#U0 Renesas Electronics America, R5F21256SNFP#U0 Datasheet - Page 397

IC R8C MCU FLASH 32K 52LQFP

R5F21256SNFP#U0

Manufacturer Part Number
R5F21256SNFP#U0
Description
IC R8C MCU FLASH 32K 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Datasheets

Specifications of R5F21256SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 17.10
Hardware LIN Read the Synch Field measurement-
UART0 Set the UART0 communication rate
Timer RA Set the Synch Break width again
UART0 Communication via UART0
Feb 29, 2008
U0BRG register
Clock asynchronous serial interface (UART) mode
Transmit ID field
TRAPRE register
TRA register
Example of Header Field Reception Flowchart (3)
completed flag
SFDCT flag in the LINST register
SFDCT = 1 ?
Page 378 of 485
YES
YES
B
NO
Hardware LIN measures the Synch
Field.
The interrupt of timer RA may be
used (the SBDCT flag is set when
the timer RA counter underflows
upon reaching the terminal count).
When the SBE bit in the LINCR
register is set to 1 (unmasked after
Synch Field measurement is
completed), timer RA may be used
in timer mode after the SFDCT bit in
the LINST register is set to 1.
Set a communication rate based on
the Synch Field measurement
result.
Communication via UART0
(The SBDCT flag is set when the
timer RA counter underflows upon
reaching the terminal count.)
17. Hardware LIN

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