R5F21256SNFP#U0 Renesas Electronics America, R5F21256SNFP#U0 Datasheet - Page 508
R5F21256SNFP#U0
Manufacturer Part Number
R5F21256SNFP#U0
Description
IC R8C MCU FLASH 32K 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21246SDFPU0.pdf
(61 pages)
3.R5F21246SDFPU0.pdf
(527 pages)
Specifications of R5F21256SNFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21256SNFP#U0R5F21256SNFP#ES
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Rev.
0.20
REVISION HISTORY
Jan 16, 2006 166 to 168 Tables 14.12 Pin Functions TRDIOA0/TRDCLK(P2_0)
Date
Page
170
170
171
172
173
174
176
177
178
179
180
183
184
185
187
189
14.3.5 Input Capture Function;
14.3.5.1 Digital Filter;
Tables 14.13 Pin Functions TRDIOB0(P2_1)
Tables 14.14 Pin Functions TRDIOC0(P2_2)
Tables 14.15 Pin Functions TRDIOD0(P2_3)
Tables 14.16 Pin Functions TRDIOA1(P2_4)
Tables 14.17 Pin Functions TRDIOB1(P2_5)
Tables 14.18 Pin Functions TRDIOC1(P2_6)
Tables 14.19 Pin Functions TRDIOD1(P2_7)
Tables 14.20 Pin Functions INT0(P4_5) added
14.3.1 Mode Selection deleted
Table 14.21 Count Source Selection revised
14.3.1 Count Sources;
Figure14.29 Buffer Operation in Input Capture Function revised
Figure14.30 Buffer Operation in Output Capture Function revised
14.3.2 Buffer Operation;
14.3.3 Synchronous Operation;
14.3.4 Pulse Output Forced Cutoff;
Table 14.23 Specifications of Input Capture Function revised
Figure 14.34 Registers TRDSTR and TRDMR in Input Capture Function
revised
Figure 14.35 TRDPMR Register in Input Capture Function revised
Figure 14.36 TRDFCR Register in Input Capture Function revised
Figure 14.39 Registers TRDIORA0 to TRDIORA1 in Input Capture
Function revised
Figure 14.40 Registers TRDIORC0 to TRDIORC1 in Input Capture
Function revised
Figure 14.41 Registers TRDSR0 to TRDSR1 in Input Capture Function
revised
Table 14.25 Input Pin Function in Input Capture Function deleted
R8C/24 Group, R8C/25 Group Hardware Manual
“TRDCRi register to ...” → “TRDCRi register (i = 0 or 1) to ...” revised
“input capture and ...” → “timer mode (input capture and ...”
“the IOC2 to IOC0 bits in ...” → “the IOC2 bit in ...”
“the IOA2 to IOA0 bits in ...” → “the IOA2 bit in ...”
“the IOD2 to IOD0 bits in ...” → “the IOD2 bit in ...”
“the IOB2 to IOC0 bits in ...” → “the IOB2 bit in ...” revised
“Bits IMFC and IMFD in the TRDSRi...input capture function.” added
“For the synchronous operation, ... register = 110b).” deleted
“P2D” → “PD2”, “P4D” → “PD4”, and “P4_5” → “PD4_5”, revised
“According to the selection ... details of interrupts.” added
“The TRDGRA0 register can also ... trigger input.” added
Figure 14.33 Block Diagram of Input Capture Function revised
“TRDDF register ...” → “TRDDFi register ...” revised
C - 4
Description
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