MCHC908MR8VFAE Freescale Semiconductor, MCHC908MR8VFAE Datasheet - Page 275
MCHC908MR8VFAE
Manufacturer Part Number
MCHC908MR8VFAE
Description
IC MCU 8K FLASH 8MHZ PWM 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MCHC908MR8VFAE.pdf
(372 pages)
Specifications of MCHC908MR8VFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Processor Series
HC08MR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCHC908MR8VFAE
Manufacturer:
Freescale
Quantity:
8 393
Company:
Part Number:
MCHC908MR8VFAE
Manufacturer:
Freescale Semiconductor
Quantity:
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13.9.5 SCI Status Register 2
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
SCI status register 2 (SCS2) contains flags to signal these conditions:
BKF — Break Flag Bit
RPF —Reception-in-Progress Flag Bit
Reset:
dress:
Read:
Write:
Ad-
•
•
This clearable, read-only bit is set when the SCI detects a break
character on the PTB0/RxD pin. In SCS1, the FE and SCRF bits are
also set. In 9-bit character transmissions, the R8 bit in SCC3 is
cleared. BKF does not generate a CPU interrupt request. Clear BKF
by reading SCS2 with BKF set and then reading the SCDR. Once
cleared, BKF can become set again only after logic 1s again appear
on the PTB0/RxD pin followed by another break character. Reset
clears the BKF bit.
This read-only bit is set when the receiver detects a logic 0 during the
RT1 time period of the start bit search. RPF does not generate an
interrupt request. RPF is reset after the receiver detects false start bits
(usually from noise or a baud rate mismatch, or when the receiver
detects an idle character. Polling RPF before disabling the SCI
module or entering stop mode can show whether a reception is in
progress.
1 = Break character detected
0 = No break character detected
1 = Reception in progress
0 = No reception in progress
Break character detected
Incoming data
$003C
Serial Communications Interface (SCI)
Bit 7
R
R
0
0
Figure 13-12. SCI Status Register 2 (SCS2)
= Reserved
R
6
0
0
R
5
0
0
R
4
0
0
Serial Communications Interface (SCI)
R
3
0
0
R
2
0
0
BKF
R
1
0
Technical Data
I/O Registers
Bit 0
RPF
R
0
275
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