MCHC908MR8VFAE Freescale Semiconductor, MCHC908MR8VFAE Datasheet - Page 324
MCHC908MR8VFAE
Manufacturer Part Number
MCHC908MR8VFAE
Description
IC MCU 8K FLASH 8MHZ PWM 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MCHC908MR8VFAE.pdf
(372 pages)
Specifications of MCHC908MR8VFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Processor Series
HC08MR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCHC908MR8VFAE
Manufacturer:
Freescale
Quantity:
8 393
Company:
Part Number:
MCHC908MR8VFAE
Manufacturer:
Freescale Semiconductor
Quantity:
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Analog-to-Digital Converter (ADC)
18.9.4 ADC Clock Register
Technical Data
324
In 8-bit mode, this 8-bit result register holds the eight MSBs of the 10-bit
result. This register is updated each time an ADC conversion completes.
In 8-bit mode, this register contains no interlocking with ADRH.
Reset:
This register selects the clock frequency for the ADC, selecting between
modes of operation.
Reset:
ADIV2:ADIV0 — ADC Clock Prescaler Bits
dress:
dress:
Read:
Read:
Write:
Write:
Ad-
Ad-
ADIV2, ADIV1, and ADIV0 form a 3-bit field which selects the divide
ratio used by the ADC to generate the internal ADC clock.
shows the available clock configurations. The ADC clock should be
set to between 500 kHz and 1 MHz.
ADIV2
$0042
$0043
Bit 7
Bit 7
AD9
R
R
R
Analog-to-Digital Converter (ADC)
0
Figure 18-8. ADC Data Register Low (ADRL)
Figure 18-9. ADC Clock Register (ADCLK)
= Reserved
= Reserved
ADIV1
AD8
R
6
6
0
ADIV0
AD7
R
5
5
0
8-Bit Mode
Unaffected by Reset
ADICLK MODE1 MODE0
AD6
R
4
4
0
AD5
R
3
3
0
MC68HC908MR8 — Rev 4.1
AD4
Freescale Semiconductor
R
2
2
1
AD3
R
1
1
0
0
Table 18-2
Bit 0
Bit 0
AD2
R
R
0
0
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