MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 317

• Manufacturer Part Number: MC9S12NE64CPV
• Description: IC MCU 25MHZ ETHERNT/PHY 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64CPV

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 16 bit
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

TCMD — Transmit Command
11.3.2.4 Ethertype Control (ETCTL)
Read: Anytime.
Write: Anytime, but the user must not change this field while EMACE is set. Changing values while the
receiver is active will affect the outcome of the Ethertype filter.
If every bit in ETCTL is clear, there is no mask for Ethertype messages so all are received. Conversely, if
any bit in ETCTL is set, Ethertype filtering will occur and will be defined by the configuration bits.
FPET — Programmable Ethertype
Freescale Semiconductor
This is a 2-bit write-only field that can launch three different transmission commands: START,
PAUSE, or ABORT. The START command starts transmission of the frame in the transmit buffer. The
PAUSE command starts transmission of a hardware-generated PAUSE frame. The ABORT command
terminates any current transmission after a bad CRC is appended to the frame currently being
transmitted and MII_TXER is asserted. The ABORT command does not affect any received PAUSE
time out. See
Generated PAUSE Control Frame
If this bit is set, all messages with the Ethertype in ETYPE are accepted. If this bit is clear, messages
of this type are ignored.
1 = Accept Ethertype messages selected in ETYPE.
0 = Ignore Ethertype messages selected in ETYPE.
Module Base + $5
RESET:
W
R
TCMD
The START and PAUSE commands are ignored if there is a transmission in
progress (TXACT is set). After the reception of a PAUSE frame, a launched
START command is suspended until the pause time has expired. During the
pause time, the EMAC may transmit a control PAUSE frame if no START
transmission is pending.
0
1
2
3
Table
FPET
7
0
11-4,
= Unimplemented or Reserved
Command
Section 11.4.3,
Reserved
6
0
0
ABORT
PAUSE
START
Figure 11-5. Ethertype Control (ETCTL)
Table 11-4. Transmit Commands
MC9S12NE64 Data Sheet, Rev. 1.1
Transmission,”
5
0
0
“Transmitter,”
FEMW
NOTE
Transmit PAUSE frame (full-duplex mode only)
4
0
for more detail.
FIPV6
Transmit buffer frame
and section
3
0
Abort transmission
Description
Ignore
FARP
2
0
Section 11.4.5.2, “Hardware
Memory Map and Register Descriptions
FIPV4
1
0
FIEEE
0
0
317