HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 210

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(1) Static memory area allocation
******* SECTION SIZE INFORMATION *******
PROGRAM
CONSTANT
DATA
BSS
TOTAL
TOTAL
TOTAL
TOTAL
TOTAL
196
(a) Contents of static memory area
(b) Calculation of size
Sections other than the stack area and heap area are allocated statically.
Each of the sections in a C/C++ program (program area, constant area, initialized data area,
uninitialized data area, function address area, initialized data section address area,
uninitialized data section address area, C++ initial processing/postprocessing data area,
and C++ virtual function table area) is allocated statically.
The size of static memory is the sum of the sizes of the object programs generated by the
compiler and assembler and the sizes of the library functions used by the C/C++ program.
After linking an object program, the sizes of each section, including libraries, are output to
the linkage map information of the linkage list, and so the size of static memory can be
determined. Figure 9.1 shows an example of linkage map information in the linkage list.
Section sizes of compiling and assembly units are output to the statistics information of the
compile list and section information of the assembly list. An example of compile list
statistics information is shown in figure 9.2, and an example of assembly list section
information appears in figure 9.3.
*** Mapping List ***
SECTION
P
C
D
B
PROGRAM
CONSTANT
DATA
BSS
PROGRAM
(1)
SECTION (P):
SECTION (C):
SECTION (D):
SECTION (B):
Figure 9.1 Example of Linkage Map Information in Linkage List
Figure 9.2 Example of Compile List Statistics Information
SIZE:
SECTION:
SECTION:
SECTION:
SECTION:
0x0000008C Byte(s)
0x00000080 Byte(s)
0x00000004 Byte(s)
0x00000004 Byte(s)
0x00000004 Byte(s)
00000000
000004d6
00000534
0000053c
START
(2)
0x00000080 Byte(s)
0x00000004 Byte(s)
0x00000004 Byte(s)
0x00000004 Byte(s)
000004d6
00000533
0000053c
00004112
END
(3)
SIZE
3bd6
(4)
4d6
5d
8
ALIGN
2
2
2
2
(5)