HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 804
![IC H8/SLP MCU FLASH 80QFP](/photos/12/20/122049/hd64f38024dv_sml.jpg)
HD64F38024DV
Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets
1.US38024-BAG1.pdf
(684 pages)
2.DF36012GFYV.pdf
(1021 pages)
3.DF38102HV.pdf
(145 pages)
Specifications of HD64F38024DV
Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F38024DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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11.7 Overview of Structured Assembly
The structured assembly functions provided by this assembler expand instructions which perform
testing and iteration.
Table 11.18 lists the conditions for the condition codes that are used for the structured assembly
directives.
Table 11.18 Condition Codes
Item
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Notes: N ... The CCR (condition code register) N (negative) flag
790
Z .... The CCR Z (zero) flag
V .... The CCR V (overflow) flag
C ... The CCR C (carry) flag
v .... Logical or
Condition
Codes
<EQ>
<NE>
<GT>
<LT>
<GE>
<LE>
<HI>
<LO> <CS>
<HS> <CC>
<LS>
<VC>
<VS>
<PL>
<MI>
<T>
<F>
... Logical exclusive or
Comparison Type
<term 1> = <term 2>
<term 1>
<term 1> > <term 2> (signed comparison)
<term 1> < <term 2> (signed comparison)
<term 1>
<term 1>
<term 1> > <term 2> (unsigned comparison)
<term 1> < <term 2> (unsigned comparison)
<term 1>
<term 1>
<term 2>
<term 2> (signed comparison)
<term 2> (signed comparison)
<term 2> (unsigned comparison)
<term 2> (unsigned comparison)
Condition Code
Specification Type
Z=1
Z=0
Zv(N V)=0
N V=1
N V=0
Zv(N V)=1
CvZ=0
C=1
C=0
CvZ=1
V=0
V=1
N=0
N=1
Always true
Always false
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