HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 795

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2) Preprocessor variable reference (.ASSIGNA, .ASSIGNC)
(3) Macro generation number
Example:
V:
V1:
Expanded results are as follows:
Preprocessor variables can be referenced in a macro body.
The syntax for preprocessor variable reference is as follows:
\&<preprocessor variable name>[']
To clearly distinguish the preprocessor variable name from the rest of the source statement,
add an apostrophe (').
The macro generation number facility is used to avoid the problem that symbols used within a
macro body will be multiply defined if the macro is expanded multiple times. To avoid this
problem, specify the macro generation number marker as part of any symbol used in a macro.
This will result in symbols that are unique to each macro call.
The macro generation number marker is expanded as a 5-digit decimal number (between
00000 and 99999) unique to the macro expansion.
The syntax for specifying the macro generation number marker is as follows:
\@
Two or more macro generation number markers can be written in a macro body, and they will
be expanded to the same number in one macro call.
Because macro generation number markers are expanded to numbers, they must not be written
at the beginning of symbol names.
.MACRO
ADD
.SDATA
.ENDM
.ASSIGNC "R"
.ASSIGNA 1
PLUS1
ADD
.SDATA
PLUS1
#1,R\&V1
"\&V'1"
#1,R1
"R1"
; Preprocessor variable V1 is referenced.
; Preprocessor variable V is referenced.
; Preprocessor variable V is defined.
; Preprocessor variable V1 is defined.
; PLUS1 is expanded.
; Preprocessor variable V1 is referenced.
; Preprocessor variable V is referenced.
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