DF2329BVTE25V Renesas Electronics America, DF2329BVTE25V Datasheet - Page 294

IC H8S MCU FLASH 384K 120TQFP

DF2329BVTE25V

Manufacturer Part Number
DF2329BVTE25V
Description
IC H8S MCU FLASH 384K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2329BVTE25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2329BVTE25V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2329BVTE25V
Manufacturer:
Renesas
Quantity:
301
Part Number:
DF2329BVTE25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 2 Instruction Descriptions
2.6
The tables in this section can be used to calculate the number of states required for instruction
execution by the CPU. Table 2.5 indicates the number of instruction fetch, data read/write, and
other cycles occurring in each instruction. Table 2.4 indicates the number of states required for
each cycle, depending on its size. The number of states required for each cycle depends on the
product. See the hardware manual named for the relevant product for details. The number of states
required for execution of an instruction can be calculated from these two tables as follows:
Examples: Advanced mode, program code and stack located in external memory, on-chip
supporting modules accessed in two states with 8-bit bus width, external devices accessed in three
states with one wait state and 16-bit bus width.
1. BSET #0, @FFFFC7:8
2. JSR @@30
Rev. 4.00 Feb 24, 2006 page 278 of 322
REJ09B0139-0400
From table 2.5:
From table 2.4:
Number of states required for execution = 2
From table 2.5:
From table 2.4:
Number of states required for execution = 2
Execution states = I
I = L = 2,
S
I = J = K = 2,
S
Number of States Required for Instruction Execution
I
I
= 4,
= S
J
= S
S
K
L
= 4
= 2
J = K = M = N= 0
L = M = N = 0
S
I
+ J S
J
+ K
S
K
+ L
4 + 2
4 + 2
S
L
+ M
2 = 12
4 + 2
S
M
4 = 24
+ N
S
N

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