M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 335

• Manufacturer Part Number: M30853FJGP#U3
• Description: IC M32C MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30853FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
5.4 Return from Interrupt Routine
e
E
v
J
Chapter 5
Figure 5.3.2 Stack status before and after an interrupt request is acknowledged
As you execute the REIT instruction at the end of the interrupt routine, the contents of the flag register (FLG)
and program counter (PC) that have been saved to the stack area immediately preceding the interrupt
sequence are automatically restored. In high-speed interrupt, as you execute the REIT instruction at the end
of the interrupt routine, the contents of the flag register (FLG) and program counter (PC) that have been
saved to the save registers immediately preceding the interrupt sequence are automatically restored.
Then control returns to the routine that was under execution before the interrupt request was acknowledged,
and processing is resumed from where control left off.
If there are any registers you saved via software in the interrupt routine, be sure to restore them using an
instruction (e.g., POPM instruction) before executing the REIT or FREIT instruction.
1 .
0
5.3.3 Saving Registers
9
0 .
Address
B
In an interrupt sequence, only the contents of the flag register (FLG) and program counter (PC) are
saved to the stack area.
The order in which these contents are saved is as follows: First, the FLG register is saved to the stack
area. Next, the 16 high-order bits and 16 low-order bits of the program counter expanded to 32-bit are
saved. Figure 5.3.2 shows the stack status before an interrupt request is acknowledged and the stack
status after an interrupt request is acknowledged.
In a high-speed interrupt sequence, the contents of the flag register (FLG) is saved to the flag save
register (SVF) and program counter (PC) is saved to PC save register (SVP).
If there are any other registers you want to be saved, save them in software at the beginning of the
interrupt routine. The PUSHM instruction allows you to save all registers except the stack pointer (SP)
by a single instruction.
Stack status before interrupt request is acknowledged
0
0
3
m-6
m-5
m–4
m–3
m–2
m–1
m
m+1
1
2
9
0
0 -
0
MSB
6
1
0 .
0
0
5
3 .
Content of
previous stack
Content of
previous stack
Interrupt
1
Stack area
p
a
g
e
317
f o
3
LSB
3
5
[SP]
Stack pointer
value before
interrupt occurs
Stack status after interrupt request is acknowledged
Address
m-6
m-5
m–4
m–3
m–2
m–1
m
m+1
MSB
Program counter
Program counter
Content of
previous stack
Content of
previous stack
Program counter
Flag register
Flag register
Stack area
(FLG
(PC
(PC
(FLG
(PC
0
M
L
H
L
)
)
)
H
)
)
0
5.3 Interrupt Sequence
LSB
[SP]
New stack
pointer value