M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 88

• Manufacturer Part Number: M30853FJGP#U3
• Description: IC M32C MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30853FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
e
E
CMP
[ Syntax ]
[ Operation ]
[ Function ]
[ Selectable src/dest ]*
[ Flag Change ]
[ Description Example ]
v
J
Chapter 3
*1 Indirect instruction addressing [src] and [dest] can be used in all addressing except R0L/R0/R2R0, R0H/R2/-, R1L/
*2 If you specify (.B) for the size specifier (.size), you cannot choose A0 and/or A1 for
Change
1 .
R0L/R0/R2R0
R1L/R1/R3R1
A0/A0/A0*
dsp:8[A0]
dsp:16[A0]
dsp:24[A0]
#IMM4/#IMM8/#IMM16/#IMM32
Conditions
0
9
CMP.size (:format)
dest
dest
Flag
0 .
B
• Each flag bit of the flag register varies depending on the result of subtraction of
• When (.B) is specified for the size specifier (.size) and
• When (.L) is specified for the size specifier (.size), and
O :
S :
Z :
C :
CMP.B:S
CMP.W:G
CMP.W
CMP.B
CMP.B
R1/R3R1, R1H/R3/-, and #IMM.
taneously.
0
0
extended to be treated as 16-bit data for the operation. Also, when
low-order bits of the address register are used as data to be operated on.
register is zero-extended to be treated as 32-bit data for the operation. The flags also change states
depending on the result of 32-bit operation.
3
1
2
9
0
-
-
0 -
U
0
The flag is set when a signed operation resulted in exceeding [phone](.L) or
-2147483648(.L), +32767 (.W) or -32768 (.W), or +127 (.B) or -128 (.B); otherwise cleared.
The flag is set when the operation resulted in MSB = 1; otherwise cleared.
The flag is set when the operation resulted in 0; otherwise cleared.
The flag is set when an unsigned operation resulted in any value equal to or greater than 0;
otherwise cleared.
6
1
2
0 .
0
src
[src]
0
5
I
A1/A1/A1*
dsp:8[A1]
dsp:16[A1]
dsp:24[A1]
3 .
Functions
1
#10,R0L
R0,A0
#-3,R0
#5,Ram:8[FB]
A0,R0L
O
p
a
g
e
B
1
src
2
70
S
[A0]
dsp:8[SB]
dsp:16[SB]
abs24
R0H/R2/-
R1H/R3/-
src,dest
[dest]
[dest]
f o
Z
3
3
5
D
-
-
C
[src]
src
[A1]
dsp:8[FB]
dsp:16[FB]
abs16
G , Q , S (Can be specified)
B , W, L
(See the next page for
CoMPare
Compare
; A0's 8 low-order bits and R0L are compared.
R0L/R0/R2R0
R1L/R1/R3R1
A0/A0/A0*
dsp:8[A0]
dsp:16[A0]
dsp:24[A0]
dest
src
is the address register (A0, A1),
2
or
[ Instruction Code/Number of Cycles ]
A1/A1/A1*
dsp:8[A1]
dsp:16[A1]
dsp:24[A1]
dest
src
src
is the address register, address
/
dest
dest
is the address register, the 8
2
classified by format.)
R0H/R2/-
R1H/R3/-
[A0]
dsp:8[SB]
dsp:16[SB]
abs24
src
src
from
and
3.2 Functions
dest
[A1]
dsp:8[FB]
dsp:16[FB]
abs16
CMP
src
dest
Page=
.
is zero-
simul-
200