M30833FJGP#U3 Renesas Electronics America, M30833FJGP#U3 Datasheet - Page 85

• Manufacturer Part Number: M30833FJGP#U3
• Description: IC M32C/83 MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30833FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 87
• Interface Type: UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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Figure 7.4 External Bus Operation with Software Wait State (1)
2
0
C
1
9
3 .
B
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0
1
3
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(3) Separate Bus with 2 Wait States
3
(1) Separate Bus with No Wait State
(2) Separate Bus with 1 Wait State
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NOTES:
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0 -
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BCLK
Address Bus
Write Signal
Read Signal
Data Bus
Chip-Select Signal
Read Signal
Data Bus
Chip-Select Signal
Chip-Select Signal
BCLK
Write Signal
Address Bus
3 .
BCLK
Write Signal
Data Bus
Address Bus
1
u
Read Signal
1. This example illustrates bus cycle length. Read cycle and write cycle may occur consecutively.
2. The address bus and chip-select signal may be extended depending on CPU state such as an
3. When the microcomputer continuously accesses the same external space (same CS area), the chip-
, 1
3
p
1
instruction queue buffer.
select signal may be output continuously.
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0
0
3
6
2
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(2)
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(2)
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(2, 3)
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8
Address
Bus cycle
Data Output
Bus cycle
Bus cycle
Address
Address
(1)
Output
Output
(1)
(1)
Bus cycle
Address
Input
(1)
Bus cycle
Address
Bus cycle
Address
(1)
(1)
Input
Input
7. Bus