R5F21191SP#U0 Renesas Electronics America, R5F21191SP#U0 Datasheet - Page 100

• Manufacturer Part Number: R5F21191SP#U0
• Description: IC R8C MCU FLASH 8K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/19r

Specifications of R5F21191SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x1b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/18 Group, R8C/19 Group
Rev.1.30
REJ09B0222-0130
Figure 12.9
12.1.6.8
12.1.6.9
When the REIT instruction is executed at the end of an interrupt routine, the FLG register and PC,
which have been saved to the stack, are automatically restored. The program, that was running
before the interrupt request was acknowledged, starts running again.
Restore registers saved by a program in an interrupt routine using the POPM instruction or others
before executing the REIT instruction.
If two or more interrupt requests are generated while a single instruction is being executed, the
interrupt with the higher priority is acknowledged.
Set bits ILVL2 to ILVL0 to select the desired priority level for maskable interrupts (peripheral
functions). However, if two or more maskable interrupts have the same priority level, their interrupt
priority is resolved by hardware, and the higher priority interrupts acknowledged.
The priority levels of special interrupts, such as reset (reset has the highest priority) and watchdog
timer, are set by hardware. Figure 12.9 shows the Priority Levels of Hardware Interrupts.
The interrupt priority does not affect software interrupts. The MCU jumps to the interrupt routine
when the instruction is executed.
Apr 14, 2006
Returning from an Interrupt Routine
Interrupt Priority
Priority Levels of Hardware Interrupts
Page 83 of 233
Oscillation stop detection
Peripheral function
Voltage monitor 2
Watchdog timer
Address match
Address break
Single step
Reset
High
Low
12. Interrupts