R5F21191SP#U0 Renesas Electronics America, R5F21191SP#U0 Datasheet - Page 165

IC R8C MCU FLASH 8K 20SSOP

R5F21191SP#U0

Manufacturer Part Number
R5F21191SP#U0
Description
IC R8C MCU FLASH 8K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/19r
Datasheets

Specifications of R5F21191SP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x1b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/18 Group, R8C/19 Group
Rev.1.30
REJ09B0222-0130
Figure 15.3
UARTi Bit Rate Register (i = 0 or 1)
UARTi Transmit Buffer Register (i = 0 or 1)
UARTi Receive Buffer Register (i = 0 or 1)
(b15)
(b15)
b7
NOTES:
b7
NOTES:
b7
NOTES:
1.
2.
3. After setting the CLK0 to CLK1 bits of the UiC0 register, w rite to the UiBRG register.
1.
2.
1.
2.
Write to this register w hile the serial I/O is neither transmitting nor receiving.
Use the MOV instruction to w rite to this register.
Read out the UiRB register in 16-bit units.
Bits SUM, PER, FER, and OER are set to 0 (no error) w hen bits SMD2 to SMD0 in the UiMR register are set to 000b
(serial interface disabled) or the RE bit in the UiC1 register is set to 0 (receive disabled). The SUM bit is set to 0 (no
error) w hen bits PER, FER, and OER are set to 0 (no error). Bits PER and FER are set to 0 even w hen the higher byte
of the UiRB register is read out.
Also, bits PER and FER are set to 0 w hen reading the high-order byte of the UiRB register.
When the transfer data length is 9 bits, w rite data to high byte first, then low byte.
Use the MOV instruction to w rite to this register.
Apr 14, 2006
Registers U0TB to U1TB, U0RB to U1RB, and U0BRG to U1BRG
(b8)
(b8)
b0
b0
b0
b7
b7
Assuming the set value is n, UiBRG divides the count source by n+1
Bit Symbol
Bit Symbol
(b15-b9)
(b11-b9)
Symbol
U0BRG
U1BRG
(b8-b0)
(b7-b0)
SUM
(b8)
OER
FER
PER
Page 148 of 233
Transmit data
Nothing is assigned. If necessary, set to 0.
When read, the content is undefined.
Nothing is assigned. If necessary, set to 0.
When read, the content is undefined.
Overrun error flag
Framing error flag
Parity error flag
Error sum flag
b0
b0
(1, 2, 3)
Symbol
U0RB
U1RB
Symbol
U0TB
U1TB
(1)
(1, 2)
(2)
Bit Name
Function
(2)
(2)
(2)
00A7h-00A6h
00AFh-00AEh
Address
Address
00A1h
00A9h
00ABh-00AAh
00A3h-00A2h
Address
Function
Receive data (D7 to D0)
Receive data (D8)
0 : No overrun error
1 : Overrun error
0 : No framing error
1 : Framing error
0 : No parity error
1 : Parity error
0 : No error
1 : Error
After Reset
Undefined
Undefined
Function
Setting Range
After Reset
00h to FFh
Undefined
Undefined
After Reset
Undefined
Undefined
15. Serial Interface
WO
WO
RW
RW
RW
RO
RO
RO
RO
RO
RO

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