R5F21191SP#U0 Renesas Electronics America, R5F21191SP#U0 Datasheet - Page 149

• Manufacturer Part Number: R5F21191SP#U0
• Description: IC R8C MCU FLASH 8K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/19r

Specifications of R5F21191SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x1b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/18 Group, R8C/19 Group
Rev.1.30
REJ09B0222-0130
Figure 14.21
Timer Z Mode Register
Timer Z Waveform Output Control Register
b7 b6 b5 b4
NOTES:
b7 b6 b5 b4
NOTES:
1.
2.
1.
2.
1 1
When the TZS bit is set to 1 (count starts), the count value is w ritten to the reload register only. When the TZS bit is
set to 0 (count stops), the count value is w ritten to both reload register and counter.
Refer to 14.2.5 Notes on Tim er Z for precautions regarding the TZS bit.
Set the INOSTG bit to 1 after the INT0EN bit in the INTEN register and the INOSEG bit in the PUM register
are set. When setting the INOSTG bit to 1 (INT0
in the INT0F register. Set the INOSTG bit to 0 (INT0
TZMR register is set to 0 (count stops).
The INOSEG bit is enabled only w hen the INT0PL bit in the INTEN register is set to 0 (one edge).
Apr 14, 2006
1
0 0
b3 b2
b3 b2
0
0
0
Registers TZMR and PUM in Programmable Wait One-Shot Generation Mode
b1
b1 b0
0
0 0
b0
0
Bit Symbol
Bit Symbol
TZMOD0
TZMOD1
INOSTG
INOSEG
(b3-b0)
(b4-b0)
Symbol
Symbol
TZOPL
TZWC
TZMR
TZS
PUM
Page 132 of 233
—
—
Reserved bits
Timer Z operating mode
bits
Timer Z w rite control bit
Timer Z count start flag
Reserved bits
Timer Z output level latch
_____
INT0
control bit
_____
INT0
polarity select bit
pin one-shot trigger
pin one-shot trigger
Address
Bit Name
(1)
0080h
Address
Bit Name
0084h
_____
_____
(2)
pin one-shot trigger enabled), set bits INT0F0 to INT0F1
pin one-shot trigger disabled) after the TZS bit in the
(2)
b5 b4
1 1 : Programmable w ait one-shot generation mode
Set to 0.
Set to 1 in programmable w ait one-shot generation
mode.
0 : Stops counting.
1 : Starts counting.
Set to 0.
0 : Outputs one-shot pulse “H”.
1 : Outputs one-shot pulse “L”.
0 : INT0
1 : INT0
0 : Falling edge trigger
1 : Rising edge trigger
(1)
Outputs “L” w hen the timer is stopped.
Outputs “H” w hen the timer is stopped.
_____
_____
pin one-shot trigger disabled
pin one-shot trigger enabled
After Reset
Function
After Reset
00h
Function
00h
14. Timers
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW