R5F21191SP#U0 Renesas Electronics America, R5F21191SP#U0 Datasheet - Page 160

IC R8C MCU FLASH 8K 20SSOP

R5F21191SP#U0

Manufacturer Part Number
R5F21191SP#U0
Description
IC R8C MCU FLASH 8K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/19r
Datasheets

Specifications of R5F21191SP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x1b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/18 Group, R8C/19 Group
Rev.1.30
REJ09B0222-0130
14.3.2
Table 14.12
NOTES:
Count sources
Count operations
Count start condition
Counter stop condition
Waveform output start
condition
Waveform output stop
condition
Interrupt request
generation timing
INT3/TCIN pin function
P1_0 to P1_2 pins and
P3_0 to P3_2 pins
functions
Counter value reset timing
Read from timer
Write to timer
Select functions
1. When the corresponding port data is 1, the waveform is output depending on the setting of the
2. Access registers TC, TM0, and TM1 in 16-bit units.
In output compare mode, an interrupt request is generated when the value of the TC register matches
the value of the TM0 or TM1 register. Table 14.12 shows the Output Compare Mode Specifications.
Figure 14.31 shows an Operating Example in Output Compare Mode.
registers TCC1 and TCOUT. When the corresponding port data is 0, the fixed level is output (refer to
Figure 14.25 Block Diagram of CMP Waveform Output Unit).
Apr 14, 2006
Output Compare Mode
Item
(2)
Output Compare Mode Specifications
(2)
Page 143 of 233
f1, f8, f32, fRING-fast
• Increment
• The value in the TC register is set to 0000h when the count stops.
The TCC00 bit in the TCC0 register is set to 1 (count starts).
The TCC00 bit in the TCC0 register is set to 0 (count stops).
Bits TCOUT0 to TCOUT5 in the TCOUT register are set to 1 (enables CMP
output).
Bits TCOUT0 to TCOUT5 in the TCOUT register are set to 0 (disables CMP
output).
• When a match occurs in compare circuit 0 [compare 0 interrupt].
• When a match occurs in compare circuit 1 [compare 1 interrupt].
• When time C overflows [timer C interrupt].
Programmable I/O port or INT3 interrupt input
Programmable I/O port or CMP output
When the TCC00 bit in the TCC0 register is set to 0 (count stops).
• The value in the compare register can be read out by reading registers
• The count value can be read out by reading the TC register.
• Write to the TC register is disabled.
• The values written to registers TM0 and TM1 are stored in the compare
• Timer C counter reload select function
• Bits TCC14 to TCC15 in the TCC1 register can be used to select the
• Bits TCOUT6 to TCOUT7 in the TCOUT register can select whether the
TM0 and TM1.
register in the following timings:
output level when compare circuit 0 matches. Bits TCC16 to TCC17 in the
TCC1 register can be used to select the output level when compare circuit
1 matches.
output is inverted or not.
- When registers TM0 and TM1 are written to, if the TCC00 bit is set to 0
- When the counter overflows, if the TCC00 bit is set to 1 (during counting)
- When the compare 1 matches a counter, if the TCC00 bit is set to 1 and
The TCC12 bit in the TCC1 register can select whether the counter value
in the TC register is set to 0000h when the compare circuit 1 match.
(count stops).
and the TCC12 bit in the TCC1 register is set to 0 (free-run).
the TCC12 bit is set to 1 (the TC register is set to 0000h at compare 1
match).
(2)
Specification
(1)
14. Timers

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