R5F21191SP#U0 Renesas Electronics America, R5F21191SP#U0 Datasheet - Page 217

• Manufacturer Part Number: R5F21191SP#U0
• Description: IC R8C MCU FLASH 8K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/19r

Specifications of R5F21191SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x1b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/18 Group, R8C/19 Group
Rev.1.30
REJ09B0222-0130
17.7
17.7.1
Table 17.9
NOTES:
Mode
EW0 During auto-erasure
17.7.1.1
17.7.1.2
17.7.1.3
1. Do not use the address match interrupt while a command is being executed because the vector of
2. Do not use a non-maskable interrupt while block 0 is being automatically erased because the fixed
Before entering CPU rewrite mode (EW0 mode), select 5 MHz or below for the CPU clock using the
CM06 bit in the CM0 register and bits CM16 to CM17 in the CM1 register. This does note apply to
EW1 mode.
The following instructions cannot be used in EW0 mode because they reference data in the flash
memory: UND, INTO, and BRK.
Table 17.9 lists the EW0 Mode Interrupts and Table 17.10 lists the EW1 Mode Interrupts.
the address match interrupt is allocated in ROM.
vector is allocated in block 0.
Notes on Flash Memory Version
Auto-programming
Apr 14, 2006
CPU Rewrite Mode
Operating Speed
Prohibited Instructions
EW0 Mode Interrupts
Interrupts
Status
Page 200 of 233
Any interrupt can be used
by allocating a vector in
RAM
Request is Acknowledged
When Maskable Interrupt
Once an interrupt request is acknowledged,
auto-programming or auto-erasure is forcibly
stopped immediately and the flash memory is
reset. Interrupt handing starts after the fixed
period and the flash memory restarts. Since
the block during auto-erasure or the address
during auto-programming is forcibly stopped,
the normal value may not be read. Execute
auto-erasure again and ensure it completes
normally.
Since the watchdog timer does not stop during
the command operation, interrupt requests
may be generated. Reset the watchdog timer
regularly.
Detection and Voltage Monitor 2 Interrupt
When Watchdog Timer, Oscillation Stop
Request is Acknowledged
17. Flash Memory Version