R5F21191SP#U0 Renesas Electronics America, R5F21191SP#U0 Datasheet - Page 105

IC R8C MCU FLASH 8K 20SSOP

R5F21191SP#U0

Manufacturer Part Number
R5F21191SP#U0
Description
IC R8C MCU FLASH 8K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/19r
Datasheets

Specifications of R5F21191SP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x1b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/18 Group, R8C/19 Group
Rev.1.30
REJ09B0222-0130
Figure 12.15
12.2.4
Timer C Control Register 0
b7 b6 b5 b4
NOTES:
1.
2.
3.
4.
The INT3 interrupt is generated by an INT3 input. Set the TCC07 bit in the TCC0 register to 0 (INT3).
When the TCC06 bit in the TCC0 register is set to 0, an INT3 interrupt request is generated in
synchronization with the count source of timer C. If the TCC06 bit is set to 1, the INT3 interrupt
request is generated when an INT3 input occurs.
The INT3 input contains a digital filter. The INT3 level is sampled every sampling clock cycle and if
the sampled input level matches three times, the IR bit in the INT3IC register is set to 1 (interrupt
requested). The sampling clock is selected by bits TCC11 to TCC10 in the TCC1 register. If filter is
selected, the interrupt request is generated in synchronization with the sampling clock, even if the
TCC06 bit is set to 1. The P3_3 bit in the P3 register indicates the value before filtering regardless of
the contents set in bits TCC11 to TCC10.
The INT3 pin is used with the TCIN pin.
If the TCC07 bit is set to 1 (fRING128), the INT3 interrupt is generated by the fRING128 clock. The
IR bit in the INT3IC register is set to 1 (interrupt requested) every fRING128 clock cycle or every half
fRING128 clock cycle.
Figure 12.15 shows the TCC0 Register and Figure 12.16 shows the TCC1 Register.
0
Change this bit w hen the TCC00 bit is set to 0 (count stops).
The IR bit in the INT3IC register may be set to 1 (requests interrupt) w hen the TCC03, TCC04, TCC06, or TCC07 bit is
rew ritten. Refer to 12.5.5 Changing Interrupt Sources.
When the TCC13 bit is set to 1 (output compare mode) and an INT3
value of the TCC06 bit, an interrupt request is generated.
When using the INT3
Apr 14, 2006
INT3 Interrupt
b3 b2
TCC0 Register
b1 b0
_____
Bit Symbol
Symbol
TCC00
TCC01
TCC02
TCC03
TCC04
TCC06
TCC07
TCC0
(b5)
Page 88 of 233
filter, the INT3
Timer C count start bit
Timer C count source select
bits
_____
INT3
polarity select bits
Reserved bit
_____
INT3
generation timing select
bit
_____
INT3
input sw itch bit
_____
(2, 3)
(1)
interrupt and capture
interrupt request
interrupt and capture
interrupt is generated in synchronization w ith the clock for the digital filter.
Address
Bit Name
009Ah
(1, 2)
(1, 2)
b2 b1
0 0 : f1
0 1 : f8
1 0 : f32
1 1 : fRING-fast
b4 b3
0 0 : Rising edge
0 1 : Falling edge
1 0 : Both edges
1 1 : Do not set.
0 : Stops counting.
1 : Starts counting.
Set to 0.
0 : INT3
1 : INT3
0 : INT3
1 : fRING128
_____
synchronization w ith timer C count source.
_____
_____
_____
INT3
_____
interrupt is input, regardless of the setting
interrupt is generated in
interrupt is generated w hen
interrupt is input.
After Reset
Function
00h
(4)
12. Interrupts
RW
RW
RW
RW
RW
RW
RW
RW
RW

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