MC9S08LC36LH Freescale Semiconductor, MC9S08LC36LH Datasheet - Page 163

• Manufacturer Part Number: MC9S08LC36LH
• Description: IC MCU 36K FLASH 2K RAM 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08LC36LH

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 36KB (36K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 2x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-LQFP
• Processor Series: S08LC
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2.5 KB
• Interface Type: I2C/SCI/SPI1/SPI2
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 18
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2-ch x 12-bit
• For Use With: DEMO9S08LC60 - BOARD DEMO FOR 9S08LC60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.6
Figure 9-18
module register bit and bit field into functional groups. The model is a very high level illustration of the
LCD module showing the module’s functional hierarchy including initialization and runtime control.
9.6.1
A description of the connection between the LCD module and a seven segment LCD character is illustrated
below to provide a basic example for a LPWAVE = 0 and 1/3 duty cycle LCD implementation. The
example use backplane pins (BP0, BP1, BP2) and frontplace pins (FP0, FP1, and FP2). LCDRAM
contents and output waveforms are also shown. Output waveforms are illustrated in
Figure
Freescale Semiconductor
External Crystal = 32.768 kHz
Internal Clock Generator
9-20.
Application Information
LCD Seven Segment Example Description
is a programmer’s model of the LCD module. The programmer’s model groups the LCD
Data Bus
Figure 9-18. LCD P
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Initialization Options
LCD Frame
Frequency
Interrupt
LCD Segment Display and Blink Control
Input Clock Source
Module Enable
Frame Frequency
Blink Rate
LCD Segment Energize
Clear Display
LCDBCTL
BLKMODE
BRATE[2:0]
LCDRAM Mode Select
LCDCR0
LCDCLKS
LCDMISC
Segment Energize
LCDEN
LCLK[2:0]
SOURCE
CLKADJ[5:0]
LCDCR0
DUTY[1:0]
LCDCLR
BLANK
DIV16
LCDDRMS = 0
FP[40:0]BP[3:0]
LCDBCTL
LCDRAM
LCDCR1
LCDIEN
rogrammer’s Model
LCD charge pump capacitance
V
cap1
Power Options
and Command
LCD Pin Enable
Blink Enable
Low Power
Blink LCDRAM
FPENR[5:0]
Segment Blink
Enable
LCDMISC
LCDBCTL
FP[40:0]EN
LCDCPMS
LCDRAM
FP[40:0]BP[3:0]
LCDCPEN
BBYPASS
HDRVBUF
LCDCR1
LCDSTP3
Mode Select
BLKMODE
LCDDRMS = 1
LCDCR1
VSUPPLY[1:0]
BLINK
LCDWAI
LCDMISC
LCDIF
C
LCD
Chapter 9 Liquid Crystal Display Driver (S08LCDV1)
Diagram
V
cap2
V
V
V
V
FP[40:0]
BP[3:0]
LCD
LL2
LL1
LL3
Shown with 7-segment
LCD glass hardware
X
(not all LCD pins used)
Figure 9-19
LCD GLASS PANEL
C
BYLCD
NOTE: Configured
for power using
internal V
LCD Power Pins
and
DD
163