MC9S08LC36LH Freescale Semiconductor, MC9S08LC36LH Datasheet - Page 89

IC MCU 36K FLASH 2K RAM 64-LQFP

MC9S08LC36LH

Manufacturer Part Number
MC9S08LC36LH
Description
IC MCU 36K FLASH 2K RAM 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08LC36LH

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
36KB (36K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 2x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
64-LQFP
Processor Series
S08LC
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2.5 KB
Interface Type
I2C/SCI/SPI1/SPI2
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
18
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Minimum Operating Temperature
- 40 C
On-chip Adc
2-ch x 12-bit
For Use With
DEMO9S08LC60 - BOARD DEMO FOR 9S08LC60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08LC36LH
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
6.2.4.2
Slew rate control can be enabled for each port pin by setting the corresponding bit in the slew rate control
register (PTBSEn). When enabled, slew control limits the rate at which an output can transition in order
to reduce EMC emissions. Slew rate control has no effect on pins which are configured as inputs.
Freescale Semiconductor
PTBPE[7:0]
PTBSE[7:0]
Reset
Reset
Field
Field
7:0
7:0
W
W
R
R
PTBPE7
PTBSE7
Output Slew Rate Control Enable (
Pullup Enable for Port B Bits — For port B pins that are inputs, these read/write control bits determine whether
internal pullup devices are enabled provided the corresponding PTBDDn is 0. For port B pins that are configured
as outputs, these bits are ignored and the internal pullup devices are disabled. When bit 0, 1, 3, 6, or 7 of port B
is enabled as KBI inputs and are configured to detect rising edges/high levels, the pullup enable bits enable
pulldown rather than pullup devices.
0 Internal pullup device disabled.
1 Internal pullup device enabled.
Slew Rate Control Enable for Port B Bits — For port B pins that are outputs, these read/write control bits
determine whether the slew rate controlled outputs are enabled. For port B pins that are configured as inputs,
these bits are ignored.
0 Slew rate control disabled.
1 Slew rate control enabled.
0
1
7
7
PTBPE6
PTBSE6
Figure 6-16. Slew Rate Control Enable for Port B (PTBSE)
0
1
6
6
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Figure 6-15. Pullup Enable for Port B (PTBPE)
Table 6-8. PTBPE Field Descriptions
Table 6-9. PTBSE Field Descriptions
PTBPE5
PTBSE5
0
1
5
5
PTBPE4
PTBSE4
0
1
4
4
Description
Description
PTBSE)
PTBPE3
PTBSE3
3
0
3
1
PTBPE2
PTBSE2
0
1
2
2
Chapter 6 Parallel Input/Output
PTBPE1
PTBSE1
0
1
1
1
PTBPE0
PTBSE0
0
1
0
0
89

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