MC9S08LC36LH Freescale Semiconductor, MC9S08LC36LH Datasheet - Page 58

• Manufacturer Part Number: MC9S08LC36LH
• Description: IC MCU 36K FLASH 2K RAM 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08LC36LH

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 36KB (36K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 2x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-LQFP
• Processor Series: S08LC
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2.5 KB
• Interface Type: I2C/SCI/SPI1/SPI2
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 18
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2-ch x 12-bit
• For Use With: DEMO9S08LC60 - BOARD DEMO FOR 9S08LC60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 4 Memory
4.6.3
Bits 7 through 5 may be read or written at any time. Bits 4 through 0 always read 0 and cannot be written.
4.6.4
The FPROT register defines which FLASH sectors are protected against program and erase operations.
The FPROT register is also used to determine whether FLASH protection is disabled.
During the reset sequence, the FPROT register is loaded from the nonvolatile location NVPROT. To
change the protection that will be loaded during the reset sequence, the sector containing NVPROT must
be unprotected and erased, then NVPROT can be reprogrammed. With FPDIS set all FPROT bits are
writable, but with FPDIS clear the FPS bits are writable as long as the size of the protected region is being
increased. Any write to FPROT that attempts to decrease the size of the protected memory will be ignored.
Trying to alter data in any protected area will result in a protection violation error and the FPVIOL flag
will be set in the FSTAT register. Mass erase is not possible if any one of the sectors is protected.
In order to change the data flash block protection on a temporary basis, the FPROT register EPS bits can
be written to. To change the data flash block protection that will be loaded during the reset sequence, the
58
KEYACC
Reset
Field
5
W
R
FLASH Configuration Register (FCNFG)
FLASH Protection Register (FPROT and NVPROT)
Enable Writing of Access Key — This bit enables writing of the backdoor comparison key. For more detailed
information about the backdoor key mechanism, refer to
0 Writes to 0xFFB0–0xFFB7 are interpreted as the start of a FLASH programming or erase command.
1 Writes to NVBACKKEY (0xFFB0–0xFFB7) are interpreted as comparison key writes.
0
0
7
1
= Unimplemented or Reserved
The 0:1 bit pattern is the recommended value to be used since it requires two
bit changes before going to the unsecured state.
0
0
6
Figure 4-7. FLASH Configuration Register (FCNFG)
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
SEC01:SEC00
0:1
Table 4-10. FCNFG Field Descriptions
0:0
1:0
1:1
KEYACC
1
0
5
Table 4-9. Security States
0
0
4
Description
Section 4.5,
3
0
0
Description
unsecured
secure
secure
secure
“Security.”
0
0
2
Freescale Semiconductor
0
0
1
0
0
0