MC9S08LC36LH Freescale Semiconductor, MC9S08LC36LH Datasheet - Page 50

• Manufacturer Part Number: MC9S08LC36LH
• Description: IC MCU 36K FLASH 2K RAM 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08LC36LH

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 36KB (36K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 2x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-LQFP
• Processor Series: S08LC
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2.5 KB
• Interface Type: I2C/SCI/SPI1/SPI2
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 18
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2-ch x 12-bit
• For Use With: DEMO9S08LC60 - BOARD DEMO FOR 9S08LC60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 4 Memory
4.4.3
The steps for executing any of the commands are listed below. The FCDIV register must be initialized and
any error flags cleared before beginning command execution. The command execution steps are:
A partial command sequence can be aborted manually by writing a 0 to FCBEF any time after the write to
the memory array and before writing the 1 that clears FCBEF and launches the complete command.
Aborting a command in this way sets the FACCERR access error flag which must be cleared before
starting a new command.
A strictly monitored procedure must be obeyed or the command will not be accepted. This minimizes the
possibility of any unintended changes to the FLASH memory contents. The command complete flag
(FCCF) indicates when a command is complete. The command sequence must be completed by clearing
FCBEF to launch the command.
burst programming. The FCDIV register must be initialized before using any FLASH commands.
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1. Write a data value to an address in the FLASH array. The address and data information from this
2. Write the command code for the desired command to FCMD. The five valid commands are blank
3. Write a 1 to the FCBEF bit in FSTAT to clear FCBEF and launch the command (including its
write is latched into the FLASH interface. This write is a required first step in any command
sequence. For erase and blank check commands, the value of the data is not important. For page
erase commands, the address may be any address in the 512-byte page of FLASH to be erased. For
mass erase and blank check commands, the address can be any address in the FLASH memory.
Whole pages of 512 bytes are the smallest block of FLASH that may be erased. In some boundary
conditions with RAM or high page registers, the size of a block that is accessible to the user is less
than 512 bytes.
check (0x05), byte program (0x20), burst program (0x25), page erase (0x40), and mass erase
(0x41). The command code is latched into the command buffer.
address and data information).
Program and Erase Command Execution
Do not program any byte in the FLASH more than once after a successful
erase operation. Reprogramming bits in a byte which is already
programmed is not allowed without first erasing the page in which the byte
resides or mass erasing the entire FLASH memory. Programming without
first erasing may disturb data stored in the FLASH.
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Figure 4-2
is a flowchart for executing all of the commands except for
NOTE
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